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0d203d7c9b
- Ensure we test X86 + X64 - sitopfp / uitofp requires testing for SSE2 and SSE42 as well (part of the fix for PR26953) llvm-svn: 263640
29 lines
1020 B
LLVM
29 lines
1020 B
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X86
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; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X64
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; sign extension v2i16 to v2i32
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define void @convert_v2i16_v2i32(<2 x i32>* %dst.addr, <2 x i16> %src) nounwind {
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; X86-LABEL: convert_v2i16_v2i32:
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; X86: # BB#0: # %entry
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: psllq $48, %xmm0
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; X86-NEXT: psrad $16, %xmm0
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; X86-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,3,2,3]
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; X86-NEXT: movq %xmm0, (%eax)
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; X86-NEXT: retl
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;
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; X64-LABEL: convert_v2i16_v2i32:
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; X64: # BB#0: # %entry
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; X64-NEXT: psllq $48, %xmm0
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; X64-NEXT: psrad $16, %xmm0
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; X64-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,3,2,3]
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; X64-NEXT: movq %xmm0, (%rdi)
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; X64-NEXT: retq
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entry:
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%signext = sext <2 x i16> %src to <2 x i32> ; <<12 x i8>> [#uses=1]
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store <2 x i32> %signext, <2 x i32>* %dst.addr
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ret void
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}
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