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5cf3ee996f
consider: (and (icmp X, Y), (and Z, (icmp A, B))) It may be possible to combine (icmp X, Y) with (icmp A, B). If we successfully combine, create an 'and' instruction with Z. This fixes PR20814. N.B. There is room for improvement after this change but I'm not convinced it's worth chasing yet. llvm-svn: 216814
69 lines
1.6 KiB
LLVM
69 lines
1.6 KiB
LLVM
; RUN: opt < %s -instcombine -S | FileCheck %s
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; PR1738
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define i1 @test1(double %X, double %Y) {
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%tmp9 = fcmp ord double %X, 0.000000e+00
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%tmp13 = fcmp ord double %Y, 0.000000e+00
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%bothcond = and i1 %tmp13, %tmp9
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ret i1 %bothcond
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; CHECK: fcmp ord double %Y, %X
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}
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define i1 @test2(i1 %X, i1 %Y) {
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%a = and i1 %X, %Y
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%b = and i1 %a, %X
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ret i1 %b
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; CHECK-LABEL: @test2(
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; CHECK-NEXT: and i1 %X, %Y
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; CHECK-NEXT: ret
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}
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define i32 @test3(i32 %X, i32 %Y) {
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%a = and i32 %X, %Y
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%b = and i32 %Y, %a
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ret i32 %b
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; CHECK-LABEL: @test3(
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; CHECK-NEXT: and i32 %X, %Y
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; CHECK-NEXT: ret
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}
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define i1 @test4(i32 %X) {
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%a = icmp ult i32 %X, 31
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%b = icmp slt i32 %X, 0
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%c = and i1 %a, %b
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ret i1 %c
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; CHECK-LABEL: @test4(
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; CHECK-NEXT: ret i1 false
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}
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; Make sure we don't go into an infinite loop with this test
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define <4 x i32> @test5(<4 x i32> %A) {
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%1 = xor <4 x i32> %A, <i32 1, i32 2, i32 3, i32 4>
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%2 = and <4 x i32> <i32 1, i32 2, i32 3, i32 4>, %1
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ret <4 x i32> %2
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}
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; Check that we combine "if x!=0 && x!=-1" into "if x+1u>1"
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define i32 @test6(i64 %x) nounwind {
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; CHECK-LABEL: @test6(
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; CHECK-NEXT: add i64 %x, 1
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; CHECK-NEXT: icmp ugt i64 %x.off, 1
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%cmp1 = icmp ne i64 %x, -1
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%not.cmp = icmp ne i64 %x, 0
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%.cmp1 = and i1 %cmp1, %not.cmp
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%land.ext = zext i1 %.cmp1 to i32
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ret i32 %land.ext
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}
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define i1 @test7(i32 %i, i1 %b) {
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; CHECK-LABEL: @test7(
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 %i, 0
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; CHECK-NEXT: [[AND:%.*]] = and i1 [[CMP]], %b
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; CHECK-NEXT: ret i1 [[AND]]
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%cmp1 = icmp slt i32 %i, 1
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%cmp2 = icmp sgt i32 %i, -1
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%and1 = and i1 %cmp1, %b
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%and2 = and i1 %and1, %cmp2
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ret i1 %and2
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}
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