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llvm-mirror/lib/Target/AVR/AVR.td
Chandler Carruth ae65e281f3 Update the file headers across all of the LLVM projects in the monorepo
to reflect the new license.

We understand that people may be surprised that we're moving the header
entirely to discuss the new license. We checked this carefully with the
Foundation's lawyer and we believe this is the correct approach.

Essentially, all code in the project is now made available by the LLVM
project under our new license, so you will see that the license headers
include that license only. Some of our contributors have contributed
code under our old license, and accordingly, we have retained a copy of
our old license notice in the top-level files in each project and
repository.

llvm-svn: 351636
2019-01-19 08:50:56 +00:00

81 lines
2.7 KiB
TableGen

//===-- AVR.td - Describe the AVR Target Machine ----------*- tablegen -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===---------------------------------------------------------------------===//
// This is the top level entry point for the AVR target.
//===---------------------------------------------------------------------===//
//===---------------------------------------------------------------------===//
// Target-independent interfaces which we are implementing
//===---------------------------------------------------------------------===//
include "llvm/Target/Target.td"
//===---------------------------------------------------------------------===//
// AVR Device Definitions
//===---------------------------------------------------------------------===//
include "AVRDevices.td"
//===---------------------------------------------------------------------===//
// Register File Description
//===---------------------------------------------------------------------===//
include "AVRRegisterInfo.td"
//===---------------------------------------------------------------------===//
// Instruction Descriptions
//===---------------------------------------------------------------------===//
include "AVRInstrInfo.td"
def AVRInstrInfo : InstrInfo;
//===---------------------------------------------------------------------===//
// Calling Conventions
//===---------------------------------------------------------------------===//
include "AVRCallingConv.td"
//===---------------------------------------------------------------------===//
// Assembly Printers
//===---------------------------------------------------------------------===//
def AVRAsmWriter : AsmWriter {
string AsmWriterClassName = "InstPrinter";
bit isMCAsmWriter = 1;
}
//===---------------------------------------------------------------------===//
// Assembly Parsers
//===---------------------------------------------------------------------===//
def AVRAsmParser : AsmParser {
let ShouldEmitMatchRegisterName = 1;
let ShouldEmitMatchRegisterAltName = 1;
}
def AVRAsmParserVariant : AsmParserVariant {
int Variant = 0;
// Recognize hard coded registers.
string RegisterPrefix = "$";
string TokenizingCharacters = "+";
}
//===---------------------------------------------------------------------===//
// Target Declaration
//===---------------------------------------------------------------------===//
def AVR : Target {
let InstructionSet = AVRInstrInfo;
let AssemblyWriters = [AVRAsmWriter];
let AssemblyParsers = [AVRAsmParser];
let AssemblyParserVariants = [AVRAsmParserVariant];
}