Tom Stellard 230af572ff R600/SI: Custom lower i1 stores ... These are sometimes created by the shrink to boolean optimization in the globalopt pass. Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> llvm-svn: 203280		2014-03-07 20:12:33 +00:00
..
AArch64	Replace PROLOG_LABEL with a new CFI_INSTRUCTION.	2014-03-07 06:08:31 +00:00
ARM	Replace PROLOG_LABEL with a new CFI_INSTRUCTION.	2014-03-07 06:08:31 +00:00
CPP
Generic	CommandLine: Exit successfully for -version and -help	2014-02-28 19:08:01 +00:00
Hexagon	Fix broken CHECK lines	2014-02-16 07:31:05 +00:00
Inputs
Mips	[Mips] Testcase typo fix. No functionality change.	2014-03-05 22:54:56 +00:00
MSP430	Fix known typos	2014-01-24 17:20:08 +00:00
NVPTX	[NVPTX] Fix emitting aggregate parameters	2014-01-28 18:35:29 +00:00
PowerPC	Fixup PPC Darwin i1 argument handling	2014-03-06 00:45:19 +00:00
R600	R600/SI: Custom lower i1 stores	2014-03-07 20:12:33 +00:00
SPARC	[Sparc] Add support for parsing directives in SparcAsmParser.	2014-03-01 02:18:04 +00:00
SystemZ	Re-commit: Demote EmitRawText call in AsmPrinter::EmitInlineAsm() and remove hasRawTextSupport() call	2014-02-13 14:44:26 +00:00
Thumb	Add triples to try to fix the windows bots.	2014-02-13 16:49:47 +00:00
Thumb2	ARMv8 IfConversion must skip narrow instructions that a) define CPSR and b) wouldn't affect CPSR in an IT block	2014-02-26 11:27:28 +00:00
X86	CodeGenPrep: sink extends of illegal types into use block.	2014-03-07 11:04:30 +00:00
XCore	[XCore] Add support for the "m" inline asm constraint.	2014-03-06 16:37:48 +00:00