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llvm-mirror/test/CodeGen/AVR
Ayke van Laethem 283f599fca [AVR] Fix miscompilation of zext + add
Code like the following:

    define i32 @foo(i32 %a, i1 zeroext %b) addrspace(1) {
    entry:
      %conv = zext i1 %b to i32
      %add = add nsw i32 %conv, %a
      ret i32 %add
    }

Would compile to the following (incorrect) code:

    foo:
        mov     r18, r20
        clr     r19
        add     r22, r18
        adc     r23, r19
        sbci    r24, 0
        sbci    r25, 0
        ret

Those sbci instructions are clearly wrong, they should have been adc
instructions.

This commit improves codegen to use adc instead:

    foo:
        mov     r18, r20
        clr     r19
        ldi     r20, 0
        ldi     r21, 0
        add     r22, r18
        adc     r23, r19
        adc     r24, r20
        adc     r25, r21
        ret

This code is not optimal (it could be just 5 instructions instead of the
current 9) but at least it doesn't miscompile.

Differential Revision: https://reviews.llvm.org/D78439
2020-06-18 16:51:37 +02:00
..
atomics
calling-conv/c [AVR] Fix stack size in functions with a frame pointer 2020-06-16 13:53:32 +02:00
features [AVR] Fix I/O instructions on XMEGA 2020-05-17 19:46:09 +12:00
inline-asm
integration
intrinsics
pseudo [AVR] Fix incorrect register state for LDRdPtr 2020-03-03 17:34:54 +08:00
relax-mem
add.ll [AVR] Fix miscompilation of zext + add 2020-06-18 16:51:37 +02:00
alloca.ll
and.ll
avr-rust-issue-123.ll
branch-relaxation-long.ll
branch-relaxation.ll
brind.ll [AVR] Fix incorrect register state for LDRdPtr 2020-03-03 17:34:54 +08:00
call.ll [AVR] Remove faulty stack pushing behavior 2020-06-16 13:53:32 +02:00
clear-bss.ll
cmp.ll
com.ll
copy-data-to-ram.ll
ctlz.ll
ctpop.ll
cttz.ll
directmem.ll
div.ll [AVR] Do not use divmod calls for bigger integers 2020-04-20 13:56:38 +02:00
dynalloca.ll [AVR] Remove faulty stack pushing behavior 2020-06-16 13:53:32 +02:00
eor.ll
expand-integer-failure.ll
frame.ll
frmidx-iterator-bug.ll
hardware-mul.ll
high-pressure-on-ptrregs.ll
icall-func-pointer-correct-addr-space.ll Infer alignment of unmarked loads in IR/bitcode parsing. 2020-05-14 13:03:50 -07:00
impossible-reg-to-reg-copy.ll
interrupts.ll [AVR] Generalize the previous interrupt bugfix to signal handlers too 2020-03-31 19:33:34 +13:00
io.ll
issue-cannot-select-bswap.ll
issue-regalloc-stackframe-folding-earlyclobber.ll
large-return-size.ll
lit.local.cfg
load.ll [AVR] Fix incorrect register state for LDRdPtr 2020-03-03 17:34:54 +08:00
lower-formal-args-struct-return.ll
lower-formal-arguments-assertion.ll
neg.ll
no-print-operand-twice.ll
or.ll
PR31344.ll
PR31345.ll
PR37143.ll [AVR] Fix incorrect register state for LDRdPtr 2020-03-03 17:34:54 +08:00
pre-schedule.ll
progmem-extended.ll
progmem.ll
rem.ll
return.ll [AVR] Fix stack size in functions with a frame pointer 2020-06-16 13:53:32 +02:00
rot.ll
runtime-trig.ll
rust-avr-bug-37.ll Infer alignment of unmarked loads in IR/bitcode parsing. 2020-05-14 13:03:50 -07:00
rust-avr-bug-95.ll Infer alignment of unmarked loads in IR/bitcode parsing. 2020-05-14 13:03:50 -07:00
rust-avr-bug-99.ll
rust-avr-bug-112.ll
sections.ll [AVR] Do not place functions in .progmem.data 2020-04-20 13:56:38 +02:00
select-must-add-unconditional-jump.ll
sext.ll
shift.ll
sign-extension.ll
smul-with-overflow.ll
software-mul.ll
std-ldd-immediate-overflow.ll
store-undef.ll
store.ll
sub.ll
trunc.ll
umul-with-overflow.ll
umul.with.overflow.i16-bug.ll
unaligned-atomic-loads.ll
varargs.ll [AVR] Remove faulty stack pushing behavior 2020-06-16 13:53:32 +02:00
xor.ll
zext.ll