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e48d05bbd3
This change modifies the LLVM ISel lowering settings so that 8-bit/16-bit multiplication is expanded to calls into the compiler runtime library if the MCU being targeted does not support multiplication in hardware. Before this, MUL instructions would be generated on CPUs like the ATtiny85, triggering a CPU reset due to an illegal instruction at runtime. First raised in https://github.com/avr-rust/rust/issues/124. llvm-svn: 351523
29 lines
741 B
LLVM
29 lines
741 B
LLVM
; RUN: llc -mattr=avr6,-mul < %s -march=avr | FileCheck %s
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; RUN: llc -mcpu=attiny85 < %s -march=avr | FileCheck %s
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; RUN: llc -mcpu=ata5272 < %s -march=avr | FileCheck %s
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; RUN: llc -mcpu=attiny861a < %s -march=avr | FileCheck %s
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; RUN: llc -mcpu=at90usb82 < %s -march=avr | FileCheck %s
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; Tests lowering of multiplication to compiler support routines.
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; CHECK-LABEL: mul8:
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define i8 @mul8(i8 %a, i8 %b) {
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; CHECK: mov r25, r24
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; CHECK: mov r24, r22
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; CHECK: mov r22, r25
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; CHECK: call __mulqi3
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%mul = mul i8 %b, %a
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ret i8 %mul
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}
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; CHECK-LABEL: mul16:
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define i16 @mul16(i16 %a, i16 %b) {
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; CHECK: movw r18, r24
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; CHECK: movw r24, r22
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; CHECK: movw r22, r18
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; CHECK: call __mulhi3
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%mul = mul nsw i16 %b, %a
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ret i16 %mul
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}
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