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df3763591a
Pre-commit for D59363 (Add icmp UNDEF handling to SelectionDAG::FoldSetCC) Approved by @uweigand (Ulrich Weigand) llvm-svn: 356368
51 lines
1.7 KiB
LLVM
51 lines
1.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=s390x-linux-gnu -mcpu=z13 < %s | FileCheck %s
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; Test that DAGCombiner gets helped by getKnownBitsForTargetNode() when
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; BITCAST nodes are involved on a big-endian target.
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;
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; The EXTRACT_VECTOR_ELT is done first into an i32, and then AND:ed with
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; 1. The AND is not actually necessary since the element contains a CC (i1)
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; value. Test that the BITCAST nodes in the DAG when computing KnownBits is
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; handled so that the AND is removed. If this succeeds, this results in a CHI
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; instead of TMLL.
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define void @fun(i64 %a0) {
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; CHECK-LABEL: fun:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: lghi %r1, 0
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; CHECK-NEXT: .LBB0_1: # %lab0
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; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: la %r0, 2(%r1)
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; CHECK-NEXT: la %r1, 1(%r1)
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; CHECK-NEXT: cgr %r1, %r2
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; CHECK-NEXT: lhi %r3, 0
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; CHECK-NEXT: lochie %r3, 1
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; CHECK-NEXT: cgr %r0, %r2
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; CHECK-NEXT: lhi %r0, 0
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; CHECK-NEXT: lochie %r0, 1
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; CHECK-NEXT: vlvgp %v0, %r3, %r3
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; CHECK-NEXT: vlvgp %v1, %r0, %r0
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; CHECK-NEXT: vx %v0, %v0, %v1
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; CHECK-NEXT: vlgvf %r0, %v0, 1
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; CHECK-NEXT: chi %r0, 0
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; CHECK-NEXT: locghie %r1, 0
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; CHECK-NEXT: j .LBB0_1
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entry:
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br label %lab0
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lab0:
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%phi = phi i64 [ %sel, %lab0 ], [ 0, %entry ]
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%add = add nuw nsw i64 %phi, 1
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%add2 = add nuw nsw i64 %phi, 2
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%cmp = icmp eq i64 %add, %a0
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%cmp2 = icmp eq i64 %add2, %a0
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%ins = insertelement <2 x i1> undef, i1 %cmp, i32 0
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%ins2 = insertelement <2 x i1> undef, i1 %cmp2, i32 0
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%xor = xor <2 x i1> %ins, %ins2
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%extr = extractelement <2 x i1> %xor, i32 0
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%sel = select i1 %extr, i64 %add, i64 0
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br label %lab0
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}
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