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On SystemZ there are a set of "access registers" that can be copied in and out of 32-bit GPRs with special instructions. These instructions can only perform the copy using low 32-bit parts of the 64-bit GPRs. However, the default register class for 32-bit integers is GRX32, which also contains the high 32-bit part registers. In order to never end up with a case of such a COPY into a high reg, this patch adds a new simple pre-RA pass that selects such COPYs into target instructions. This pass also handles COPYs from CC (Condition Code register), and COPYs to CC can now also be emitted from a high reg in copyPhysReg(). Fixes: https://bugs.llvm.org/show_bug.cgi?id=44254 Review: Ulrich Weigand. Differential Revision: https://reviews.llvm.org/D75014
25 lines
741 B
YAML
25 lines
741 B
YAML
# RUN: llc -mtriple=s390x-linux-gnu -mcpu=z196 -O0 -start-after=finalize-isel \
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# RUN: -stop-before=regallocfast -o - %s | FileCheck %s
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# RUN: llc -mtriple=s390x-linux-gnu -mcpu=z196 -O3 -start-after=finalize-isel \
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# RUN: -stop-before=livevars -o - %s | FileCheck %s
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#
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# Test that a COPY from CC gets implemented with an IPM to a GR32 reg.
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---
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name: fun0
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tracksRegLiveness: true
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registers:
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- { id: 0, class: grx32bit }
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body: |
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bb.0:
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liveins: $cc
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; CHECK-LABEL: name: fun0
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; CHECK: %1:gr32bit = IPM implicit $cc
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; CHECK-NEXT: %0:grx32bit = COPY %1
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; CHECK-NEXT: $r2l = COPY %0
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; CHECK-NEXT: Return implicit $r2l
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%0:grx32bit = COPY $cc
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$r2l = COPY %0
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Return implicit $r2l
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...
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