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to reflect the new license. We understand that people may be surprised that we're moving the header entirely to discuss the new license. We checked this carefully with the Foundation's lawyer and we believe this is the correct approach. Essentially, all code in the project is now made available by the LLVM project under our new license, so you will see that the license headers include that license only. Some of our contributors have contributed code under our old license, and accordingly, we have retained a copy of our old license notice in the top-level files in each project and repository. llvm-svn: 351636
177 lines
5.8 KiB
C++
177 lines
5.8 KiB
C++
//===-------------- PPCVSXCopy.cpp - VSX Copy Legalization ----------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// A pass which deals with the complexity of generating legal VSX register
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// copies to/from register classes which partially overlap with the VSX
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// register file.
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//
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//===----------------------------------------------------------------------===//
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#include "MCTargetDesc/PPCPredicates.h"
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#include "PPC.h"
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#include "PPCHazardRecognizers.h"
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#include "PPCInstrBuilder.h"
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#include "PPCInstrInfo.h"
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#include "PPCMachineFunctionInfo.h"
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#include "PPCTargetMachine.h"
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#include "llvm/ADT/STLExtras.h"
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#include "llvm/ADT/Statistic.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineMemOperand.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/MC/MCAsmInfo.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/TargetRegistry.h"
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#include "llvm/Support/raw_ostream.h"
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using namespace llvm;
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#define DEBUG_TYPE "ppc-vsx-copy"
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namespace llvm {
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void initializePPCVSXCopyPass(PassRegistry&);
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}
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namespace {
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// PPCVSXCopy pass - For copies between VSX registers and non-VSX registers
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// (Altivec and scalar floating-point registers), we need to transform the
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// copies into subregister copies with other restrictions.
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struct PPCVSXCopy : public MachineFunctionPass {
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static char ID;
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PPCVSXCopy() : MachineFunctionPass(ID) {
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initializePPCVSXCopyPass(*PassRegistry::getPassRegistry());
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}
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const TargetInstrInfo *TII;
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bool IsRegInClass(unsigned Reg, const TargetRegisterClass *RC,
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MachineRegisterInfo &MRI) {
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if (TargetRegisterInfo::isVirtualRegister(Reg)) {
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return RC->hasSubClassEq(MRI.getRegClass(Reg));
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} else if (RC->contains(Reg)) {
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return true;
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}
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return false;
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}
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bool IsVSReg(unsigned Reg, MachineRegisterInfo &MRI) {
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return IsRegInClass(Reg, &PPC::VSRCRegClass, MRI);
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}
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bool IsVRReg(unsigned Reg, MachineRegisterInfo &MRI) {
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return IsRegInClass(Reg, &PPC::VRRCRegClass, MRI);
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}
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bool IsF8Reg(unsigned Reg, MachineRegisterInfo &MRI) {
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return IsRegInClass(Reg, &PPC::F8RCRegClass, MRI);
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}
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bool IsVSFReg(unsigned Reg, MachineRegisterInfo &MRI) {
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return IsRegInClass(Reg, &PPC::VSFRCRegClass, MRI);
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}
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bool IsVSSReg(unsigned Reg, MachineRegisterInfo &MRI) {
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return IsRegInClass(Reg, &PPC::VSSRCRegClass, MRI);
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}
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protected:
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bool processBlock(MachineBasicBlock &MBB) {
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bool Changed = false;
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MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
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for (MachineInstr &MI : MBB) {
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if (!MI.isFullCopy())
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continue;
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MachineOperand &DstMO = MI.getOperand(0);
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MachineOperand &SrcMO = MI.getOperand(1);
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if ( IsVSReg(DstMO.getReg(), MRI) &&
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!IsVSReg(SrcMO.getReg(), MRI)) {
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// This is a copy *to* a VSX register from a non-VSX register.
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Changed = true;
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const TargetRegisterClass *SrcRC = &PPC::VSLRCRegClass;
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assert((IsF8Reg(SrcMO.getReg(), MRI) ||
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IsVSSReg(SrcMO.getReg(), MRI) ||
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IsVSFReg(SrcMO.getReg(), MRI)) &&
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"Unknown source for a VSX copy");
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unsigned NewVReg = MRI.createVirtualRegister(SrcRC);
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BuildMI(MBB, MI, MI.getDebugLoc(),
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TII->get(TargetOpcode::SUBREG_TO_REG), NewVReg)
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.addImm(1) // add 1, not 0, because there is no implicit clearing
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// of the high bits.
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.add(SrcMO)
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.addImm(PPC::sub_64);
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// The source of the original copy is now the new virtual register.
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SrcMO.setReg(NewVReg);
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} else if (!IsVSReg(DstMO.getReg(), MRI) &&
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IsVSReg(SrcMO.getReg(), MRI)) {
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// This is a copy *from* a VSX register to a non-VSX register.
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Changed = true;
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const TargetRegisterClass *DstRC = &PPC::VSLRCRegClass;
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assert((IsF8Reg(DstMO.getReg(), MRI) ||
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IsVSFReg(DstMO.getReg(), MRI) ||
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IsVSSReg(DstMO.getReg(), MRI)) &&
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"Unknown destination for a VSX copy");
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// Copy the VSX value into a new VSX register of the correct subclass.
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unsigned NewVReg = MRI.createVirtualRegister(DstRC);
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BuildMI(MBB, MI, MI.getDebugLoc(), TII->get(TargetOpcode::COPY),
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NewVReg)
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.add(SrcMO);
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// Transform the original copy into a subregister extraction copy.
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SrcMO.setReg(NewVReg);
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SrcMO.setSubReg(PPC::sub_64);
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}
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}
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return Changed;
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}
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public:
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bool runOnMachineFunction(MachineFunction &MF) override {
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// If we don't have VSX on the subtarget, don't do anything.
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const PPCSubtarget &STI = MF.getSubtarget<PPCSubtarget>();
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if (!STI.hasVSX())
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return false;
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TII = STI.getInstrInfo();
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bool Changed = false;
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for (MachineFunction::iterator I = MF.begin(); I != MF.end();) {
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MachineBasicBlock &B = *I++;
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if (processBlock(B))
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Changed = true;
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}
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return Changed;
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}
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void getAnalysisUsage(AnalysisUsage &AU) const override {
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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};
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}
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INITIALIZE_PASS(PPCVSXCopy, DEBUG_TYPE,
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"PowerPC VSX Copy Legalization", false, false)
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char PPCVSXCopy::ID = 0;
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FunctionPass*
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llvm::createPPCVSXCopyPass() { return new PPCVSXCopy(); }
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