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59f9149f4e
The MemorySSA-based implementation has been enabled without issue for a while now, so keeping the old implementation around doesn't seem useful anymore. This drops the MemDep-based implementation. Differential Revision: https://reviews.llvm.org/D97877
92 lines
3.3 KiB
LLVM
92 lines
3.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -dse -S %s | FileCheck %s
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@b = local_unnamed_addr global i32 0, align 4
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; Reduced test case for PR47285.
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; `store i32 9, i32* @b` in %interesting is not killed by `store i32 23, i32* @b`
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; in %killer, because it is not overwritten before reaching the end of the
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; function via %bb.2 -> %no.overwrite.exit.
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define void @test(i1 %c.0, i1 %c.2, i1 %c.3, i1 %c.4, i1 %c.5, i1 %c.6) {
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; CHECK-LABEL: @test(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[BB_2:%.*]]
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; CHECK: bb.2:
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; CHECK-NEXT: br i1 [[C_0:%.*]], label [[BB_3:%.*]], label [[NO_OVERWRITE_EXIT:%.*]]
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; CHECK: no.overwrite.exit:
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; CHECK-NEXT: ret void
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; CHECK: bb.3:
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; CHECK-NEXT: br i1 [[C_2:%.*]], label [[BB_4:%.*]], label [[BB_7:%.*]]
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; CHECK: bb.4:
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; CHECK-NEXT: br i1 [[C_4:%.*]], label [[BB_5:%.*]], label [[BB_6:%.*]]
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; CHECK: bb.5:
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; CHECK-NEXT: store i32 99, i32* @b, align 4
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; CHECK-NEXT: br i1 [[C_3:%.*]], label [[BB_5]], label [[BB_2]]
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; CHECK: bb.6:
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; CHECK-NEXT: store i32 91, i32* @b, align 4
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; CHECK-NEXT: br i1 [[C_5:%.*]], label [[SPLIT_CRIT_EDGE_2:%.*]], label [[BB_2]]
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; CHECK: split_crit_edge.2:
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; CHECK-NEXT: store i32 27, i32* @b, align 4
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; CHECK-NEXT: br label [[EXIT:%.*]]
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; CHECK: bb.7:
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; CHECK-NEXT: br i1 [[C_4]], label [[INTERESTING:%.*]], label [[BB_8:%.*]]
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; CHECK: interesting:
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; CHECK-NEXT: store i32 9, i32* @b, align 4
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; CHECK-NEXT: br i1 [[C_6:%.*]], label [[KILLER:%.*]], label [[BB_2]]
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; CHECK: killer:
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; CHECK-NEXT: store i32 23, i32* @b, align 4
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; CHECK-NEXT: ret void
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; CHECK: bb.8:
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; CHECK-NEXT: store i32 19, i32* @b, align 4
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; CHECK-NEXT: br i1 [[C_4]], label [[EXIT]], label [[BB_2]]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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;
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entry:
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br label %bb.2
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bb.2: ; preds = %bb.8, %interesting, %bb.6, %bb.5, %entry
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br i1 %c.0, label %bb.3, label %no.overwrite.exit
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no.overwrite.exit: ; preds = %bb.2
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ret void
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bb.3: ; preds = %bb.2
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br i1 %c.2, label %bb.4, label %bb.7
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bb.4: ; preds = %bb.3
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br i1 %c.4, label %bb.5, label %bb.6
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bb.5: ; preds = %bb.5, %bb.4
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store i32 99, i32* @b, align 4
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br i1 %c.3, label %bb.5, label %bb.2
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bb.6: ; preds = %bb.4
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store i32 91, i32* @b, align 4
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br i1 %c.5, label %split_crit_edge.2, label %bb.2
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split_crit_edge.2: ; preds = %bb.6
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store i32 27, i32* @b, align 4
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br label %exit
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bb.7: ; preds = %bb.3
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br i1 %c.4, label %interesting, label %bb.8
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interesting: ; preds = %bb.7
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store i32 9, i32* @b, align 4
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br i1 %c.6, label %killer, label %bb.2
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killer: ; preds = %interesting
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store i32 23, i32* @b, align 4
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ret void
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bb.8: ; preds = %bb.7
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store i32 19, i32* @b, align 4
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br i1 %c.4, label %exit, label %bb.2
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exit: ; preds = %bb.8, %split_crit_edge.2
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ret void
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}
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