mirror of
https://github.com/RPCS3/llvm-mirror.git
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343 lines
10 KiB
LLVM
343 lines
10 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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;RUN: opt -S -reassociate < %s | FileCheck %s
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; ==========================================================================
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;
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; Xor reassociation general cases
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;
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; ==========================================================================
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; (x | c1) ^ (x | c2) => (x & c3) ^ c3, where c3 = c1^c2
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;
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define i32 @xor1(i32 %x) {
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; CHECK-LABEL: @xor1(
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; CHECK-NEXT: [[AND_RA:%.*]] = and i32 [[X:%.*]], 435
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; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[AND_RA]], 435
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; CHECK-NEXT: ret i32 [[XOR]]
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;
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%or = or i32 %x, 123
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%or1 = or i32 %x, 456
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%xor = xor i32 %or, %or1
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ret i32 %xor
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}
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; (x | c1) ^ (x | c2) => (x & c3) ^ c3, where c3 = c1^c2
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;
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define <2 x i32> @xor1_vec(<2 x i32> %x) {
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; CHECK-LABEL: @xor1_vec(
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; CHECK-NEXT: [[AND_RA:%.*]] = and <2 x i32> [[X:%.*]], <i32 435, i32 435>
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; CHECK-NEXT: [[XOR:%.*]] = xor <2 x i32> [[AND_RA]], <i32 435, i32 435>
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; CHECK-NEXT: ret <2 x i32> [[XOR]]
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;
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%or = or <2 x i32> %x, <i32 123, i32 123>
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%or1 = or <2 x i32> %x, <i32 456, i32 456>
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%xor = xor <2 x i32> %or, %or1
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ret <2 x i32> %xor
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}
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; Test rule : (x & c1) ^ (x & c2) = (x & (c1^c2))
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; Real testing case : (x & 123) ^ y ^ (x & 345) => (x & 435) ^ y
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define i32 @xor2(i32 %x, i32 %y) {
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; CHECK-LABEL: @xor2(
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; CHECK-NEXT: [[AND_RA:%.*]] = and i32 [[X:%.*]], 435
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; CHECK-NEXT: [[XOR2:%.*]] = xor i32 [[AND_RA]], [[Y:%.*]]
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; CHECK-NEXT: ret i32 [[XOR2]]
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;
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%and = and i32 %x, 123
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%xor = xor i32 %and, %y
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%and1 = and i32 %x, 456
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%xor2 = xor i32 %xor, %and1
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ret i32 %xor2
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}
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; Test rule : (x & c1) ^ (x & c2) = (x & (c1^c2))
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; Real testing case : (x & 123) ^ y ^ (x & 345) => (x & 435) ^ y
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define <2 x i32> @xor2_vec(<2 x i32> %x, <2 x i32> %y) {
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; CHECK-LABEL: @xor2_vec(
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; CHECK-NEXT: [[AND_RA:%.*]] = and <2 x i32> [[X:%.*]], <i32 435, i32 435>
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; CHECK-NEXT: [[XOR2:%.*]] = xor <2 x i32> [[AND_RA]], [[Y:%.*]]
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; CHECK-NEXT: ret <2 x i32> [[XOR2]]
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;
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%and = and <2 x i32> %x, <i32 123, i32 123>
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%xor = xor <2 x i32> %and, %y
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%and1 = and <2 x i32> %x, <i32 456, i32 456>
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%xor2 = xor <2 x i32> %xor, %and1
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ret <2 x i32> %xor2
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}
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; Test rule: (x | c1) ^ (x & c2) = (x & c3) ^ c1, where c3 = ~c1 ^ c2
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; c3 = ~c1 ^ c2
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define i32 @xor3(i32 %x, i32 %y) {
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; CHECK-LABEL: @xor3(
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; CHECK-NEXT: [[AND_RA:%.*]] = and i32 [[X:%.*]], -436
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; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], 123
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; CHECK-NEXT: [[XOR1:%.*]] = xor i32 [[XOR]], [[AND_RA]]
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; CHECK-NEXT: ret i32 [[XOR1]]
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;
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%or = or i32 %x, 123
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%xor = xor i32 %or, %y
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%and = and i32 %x, 456
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%xor1 = xor i32 %xor, %and
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ret i32 %xor1
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}
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; Test rule: (x | c1) ^ (x & c2) = (x & c3) ^ c1, where c3 = ~c1 ^ c2
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; c3 = ~c1 ^ c2
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define <2 x i32> @xor3_vec(<2 x i32> %x, <2 x i32> %y) {
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; CHECK-LABEL: @xor3_vec(
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; CHECK-NEXT: [[AND_RA:%.*]] = and <2 x i32> [[X:%.*]], <i32 -436, i32 -436>
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; CHECK-NEXT: [[XOR:%.*]] = xor <2 x i32> [[Y:%.*]], <i32 123, i32 123>
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; CHECK-NEXT: [[XOR1:%.*]] = xor <2 x i32> [[XOR]], [[AND_RA]]
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; CHECK-NEXT: ret <2 x i32> [[XOR1]]
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;
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%or = or <2 x i32> %x, <i32 123, i32 123>
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%xor = xor <2 x i32> %or, %y
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%and = and <2 x i32> %x, <i32 456, i32 456>
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%xor1 = xor <2 x i32> %xor, %and
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ret <2 x i32> %xor1
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}
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; Test rule: (x | c1) ^ c2 = (x & ~c1) ^ (c1 ^ c2)
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define i32 @xor4(i32 %x, i32 %y) {
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; CHECK-LABEL: @xor4(
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; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], -124
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; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], 435
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; CHECK-NEXT: [[XOR1:%.*]] = xor i32 [[XOR]], [[AND]]
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; CHECK-NEXT: ret i32 [[XOR1]]
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;
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%and = and i32 %x, -124
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%xor = xor i32 %y, 435
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%xor1 = xor i32 %xor, %and
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ret i32 %xor1
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}
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; Test rule: (x | c1) ^ c2 = (x & ~c1) ^ (c1 ^ c2)
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define <2 x i32> @xor4_vec(<2 x i32> %x, <2 x i32> %y) {
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; CHECK-LABEL: @xor4_vec(
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; CHECK-NEXT: [[AND:%.*]] = and <2 x i32> [[X:%.*]], <i32 -124, i32 -124>
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; CHECK-NEXT: [[XOR:%.*]] = xor <2 x i32> [[Y:%.*]], <i32 435, i32 435>
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; CHECK-NEXT: [[XOR1:%.*]] = xor <2 x i32> [[XOR]], [[AND]]
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; CHECK-NEXT: ret <2 x i32> [[XOR1]]
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;
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%and = and <2 x i32> %x, <i32 -124, i32 -124>
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%xor = xor <2 x i32> %y, <i32 435, i32 435>
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%xor1 = xor <2 x i32> %xor, %and
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ret <2 x i32> %xor1
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}
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; ==========================================================================
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;
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; Xor reassociation special cases
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;
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; ==========================================================================
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; Special case1:
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; (x | c1) ^ (x & ~c1) = c1
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define i32 @xor_special1(i32 %x, i32 %y) {
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; CHECK-LABEL: @xor_special1(
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; CHECK-NEXT: [[XOR1:%.*]] = xor i32 [[Y:%.*]], 123
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; CHECK-NEXT: ret i32 [[XOR1]]
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;
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%or = or i32 %x, 123
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%xor = xor i32 %or, %y
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%and = and i32 %x, -124
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%xor1 = xor i32 %xor, %and
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ret i32 %xor1
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}
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; Special case1:
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; (x | c1) ^ (x & ~c1) = c1
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define <2 x i32> @xor_special1_vec(<2 x i32> %x, <2 x i32> %y) {
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; CHECK-LABEL: @xor_special1_vec(
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; CHECK-NEXT: [[XOR1:%.*]] = xor <2 x i32> [[Y:%.*]], <i32 123, i32 123>
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; CHECK-NEXT: ret <2 x i32> [[XOR1]]
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;
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%or = or <2 x i32> %x, <i32 123, i32 123>
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%xor = xor <2 x i32> %or, %y
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%and = and <2 x i32> %x, <i32 -124, i32 -124>
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%xor1 = xor <2 x i32> %xor, %and
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ret <2 x i32> %xor1
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}
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; Special case1:
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; (x | c1) ^ (x & c1) = x ^ c1
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define i32 @xor_special2(i32 %x, i32 %y) {
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; CHECK-LABEL: @xor_special2(
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; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[X:%.*]], 123
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; CHECK-NEXT: [[XOR1:%.*]] = xor i32 [[XOR]], [[Y:%.*]]
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; CHECK-NEXT: ret i32 [[XOR1]]
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;
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%or = or i32 %x, 123
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%xor = xor i32 %or, %y
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%and = and i32 %x, 123
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%xor1 = xor i32 %xor, %and
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ret i32 %xor1
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}
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; Special case1:
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; (x | c1) ^ (x & c1) = x ^ c1
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define <2 x i32> @xor_special2_vec(<2 x i32> %x, <2 x i32> %y) {
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; CHECK-LABEL: @xor_special2_vec(
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; CHECK-NEXT: [[XOR:%.*]] = xor <2 x i32> [[X:%.*]], <i32 123, i32 123>
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; CHECK-NEXT: [[XOR1:%.*]] = xor <2 x i32> [[XOR]], [[Y:%.*]]
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; CHECK-NEXT: ret <2 x i32> [[XOR1]]
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;
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%or = or <2 x i32> %x, <i32 123, i32 123>
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%xor = xor <2 x i32> %or, %y
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%and = and <2 x i32> %x, <i32 123, i32 123>
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%xor1 = xor <2 x i32> %xor, %and
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ret <2 x i32> %xor1
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}
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; (x | c1) ^ (x | c1) => 0
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define i32 @xor_special3(i32 %x) {
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; CHECK-LABEL: @xor_special3(
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; CHECK-NEXT: ret i32 0
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;
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%or = or i32 %x, 123
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%or1 = or i32 %x, 123
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%xor = xor i32 %or, %or1
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ret i32 %xor
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}
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; (x | c1) ^ (x | c1) => 0
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define <2 x i32> @xor_special3_vec(<2 x i32> %x) {
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; CHECK-LABEL: @xor_special3_vec(
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; CHECK-NEXT: ret <2 x i32> zeroinitializer
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;
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%or = or <2 x i32> %x, <i32 123, i32 123>
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%or1 = or <2 x i32> %x, <i32 123, i32 123>
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%xor = xor <2 x i32> %or, %or1
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ret <2 x i32> %xor
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}
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; (x & c1) ^ (x & c1) => 0
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define i32 @xor_special4(i32 %x) {
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; CHECK-LABEL: @xor_special4(
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; CHECK-NEXT: ret i32 0
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;
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%or = and i32 %x, 123
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%or1 = and i32 123, %x
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%xor = xor i32 %or, %or1
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ret i32 %xor
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}
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; (x & c1) ^ (x & c1) => 0
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define <2 x i32> @xor_special4_vec(<2 x i32> %x) {
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; CHECK-LABEL: @xor_special4_vec(
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; CHECK-NEXT: ret <2 x i32> zeroinitializer
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;
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%or = and <2 x i32> %x, <i32 123, i32 123>
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%or1 = and <2 x i32> <i32 123, i32 123>, %x
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%xor = xor <2 x i32> %or, %or1
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ret <2 x i32> %xor
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}
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; ==========================================================================
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;
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; Xor reassociation curtail code size
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;
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; ==========================================================================
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; (x | c1) ^ (x | c2) => (x & c3) ^ c3
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; is enabled if one of operands has multiple uses
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;
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define i32 @xor_ra_size1(i32 %x) {
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; CHECK-LABEL: @xor_ra_size1(
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; CHECK-NEXT: [[OR:%.*]] = or i32 [[X:%.*]], 123
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; CHECK-NEXT: [[AND_RA:%.*]] = and i32 [[X]], 435
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; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[AND_RA]], 435
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; CHECK-NEXT: [[ADD:%.*]] = add i32 [[XOR]], [[OR]]
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; CHECK-NEXT: ret i32 [[ADD]]
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;
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%or = or i32 %x, 123
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%or1 = or i32 %x, 456
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%xor = xor i32 %or, %or1
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%add = add i32 %xor, %or
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ret i32 %add
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}
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; (x | c1) ^ (x | c2) => (x & c3) ^ c3
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; is disenabled if bothf operands has multiple uses.
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;
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define i32 @xor_ra_size2(i32 %x) {
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; CHECK-LABEL: @xor_ra_size2(
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; CHECK-NEXT: [[OR:%.*]] = or i32 [[X:%.*]], 123
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; CHECK-NEXT: [[OR1:%.*]] = or i32 [[X]], 456
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; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[OR]], [[OR1]]
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; CHECK-NEXT: [[ADD:%.*]] = add i32 [[OR1]], [[OR]]
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; CHECK-NEXT: [[ADD2:%.*]] = add i32 [[ADD]], [[XOR]]
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; CHECK-NEXT: ret i32 [[ADD2]]
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;
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%or = or i32 %x, 123
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%or1 = or i32 %x, 456
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%xor = xor i32 %or, %or1
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%add = add i32 %xor, %or
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%add2 = add i32 %add, %or1
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ret i32 %add2
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}
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; ==========================================================================
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;
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; Xor reassociation bugs
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;
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; ==========================================================================
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@xor_bug1_data = external global <{}>, align 4
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define void @xor_bug1() {
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; CHECK-LABEL: @xor_bug1(
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; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint i32* undef to i64
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; CHECK-NEXT: [[TMP2:%.*]] = xor i64 [[TMP1]], ptrtoint (<{}>* @xor_bug1_data to i64)
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; CHECK-NEXT: ret void
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;
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%1 = ptrtoint i32* undef to i64
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%2 = xor i64 %1, ptrtoint (<{}>* @xor_bug1_data to i64)
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%3 = and i64 undef, %2
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ret void
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}
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; The bug was that when the compiler optimize "(x | c1)" ^ "(x & c2)", it may
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; swap the two xor-subexpressions if they are not in canoninical order; however,
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; when optimizer swaps two sub-expressions, if forgot to swap the cached value
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; of c1 and c2 accordingly, hence cause the problem.
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;
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define i32 @xor_bug2(i32, i32, i32, i32) {
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; CHECK-LABEL: @xor_bug2(
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; CHECK-NEXT: [[TMP5:%.*]] = mul i32 [[TMP0:%.*]], 123
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; CHECK-NEXT: [[TMP6:%.*]] = and i32 [[TMP1:%.*]], 3456789
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; CHECK-NEXT: [[TMP7:%.*]] = or i32 [[TMP6]], 4567890
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; CHECK-NEXT: [[TMP8:%.*]] = and i32 [[TMP2:%.*]], 255
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; CHECK-NEXT: [[AND_RA:%.*]] = and i32 [[TMP1]], -360490541
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; CHECK-NEXT: [[TMP9:%.*]] = xor i32 [[TMP5]], 891034567
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; CHECK-NEXT: [[TMP10:%.*]] = xor i32 [[TMP9]], [[AND_RA]]
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; CHECK-NEXT: [[TMP11:%.*]] = xor i32 [[TMP10]], [[TMP7]]
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; CHECK-NEXT: [[TMP12:%.*]] = and i32 [[TMP3:%.*]], 255
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; CHECK-NEXT: [[TMP13:%.*]] = add i32 [[TMP1]], 32
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; CHECK-NEXT: [[TMP14:%.*]] = add i32 [[TMP13]], [[TMP2]]
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; CHECK-NEXT: [[TMP15:%.*]] = add i32 [[TMP14]], [[TMP8]]
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; CHECK-NEXT: [[TMP16:%.*]] = add i32 [[TMP15]], [[TMP11]]
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; CHECK-NEXT: ret i32 [[TMP16]]
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;
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%5 = mul i32 %0, 123
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%6 = add i32 %2, 24
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%7 = add i32 %1, 8
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%8 = and i32 %1, 3456789
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%9 = or i32 %8, 4567890
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%10 = and i32 %1, 543210987
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%11 = or i32 %1, 891034567
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%12 = and i32 %2, 255
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%13 = xor i32 %9, %10
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%14 = xor i32 %11, %13
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%15 = xor i32 %5, %14
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%16 = and i32 %3, 255
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%17 = xor i32 %16, 42
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%18 = add i32 %6, %7
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%19 = add i32 %18, %12
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%20 = add i32 %19, %15
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ret i32 %20
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}
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