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2413036cdd
This adds ABI and CodeGen support for the v2f64 type, which is natively supported by z13 instructions. Based on a patch by Richard Sandiford. llvm-svn: 236522
103 lines
2.5 KiB
LLVM
103 lines
2.5 KiB
LLVM
; Test vector stores.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s
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; Test v16i8 stores.
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define void @f1(<16 x i8> %val, <16 x i8> *%ptr) {
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; CHECK-LABEL: f1:
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; CHECK: vst %v24, 0(%r2)
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; CHECK: br %r14
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store <16 x i8> %val, <16 x i8> *%ptr
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ret void
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}
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; Test v8i16 stores.
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define void @f2(<8 x i16> %val, <8 x i16> *%ptr) {
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; CHECK-LABEL: f2:
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; CHECK: vst %v24, 0(%r2)
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; CHECK: br %r14
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store <8 x i16> %val, <8 x i16> *%ptr
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ret void
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}
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; Test v4i32 stores.
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define void @f3(<4 x i32> %val, <4 x i32> *%ptr) {
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; CHECK-LABEL: f3:
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; CHECK: vst %v24, 0(%r2)
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; CHECK: br %r14
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store <4 x i32> %val, <4 x i32> *%ptr
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ret void
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}
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; Test v2i64 stores.
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define void @f4(<2 x i64> %val, <2 x i64> *%ptr) {
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; CHECK-LABEL: f4:
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; CHECK: vst %v24, 0(%r2)
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; CHECK: br %r14
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store <2 x i64> %val, <2 x i64> *%ptr
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ret void
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}
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; Test v2f64 stores.
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define void @f6(<2 x double> %val, <2 x double> *%ptr) {
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; CHECK-LABEL: f6:
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; CHECK: vst %v24, 0(%r2)
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; CHECK: br %r14
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store <2 x double> %val, <2 x double> *%ptr
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ret void
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}
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; Test the highest aligned in-range offset.
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define void @f7(<16 x i8> %val, <16 x i8> *%base) {
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; CHECK-LABEL: f7:
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; CHECK: vst %v24, 4080(%r2)
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; CHECK: br %r14
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%ptr = getelementptr <16 x i8>, <16 x i8> *%base, i64 255
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store <16 x i8> %val, <16 x i8> *%ptr
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ret void
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}
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; Test the highest unaligned in-range offset.
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define void @f8(<16 x i8> %val, i8 *%base) {
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; CHECK-LABEL: f8:
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; CHECK: vst %v24, 4095(%r2)
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; CHECK: br %r14
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%addr = getelementptr i8, i8 *%base, i64 4095
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%ptr = bitcast i8 *%addr to <16 x i8> *
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store <16 x i8> %val, <16 x i8> *%ptr, align 1
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ret void
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}
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; Test the next offset up, which requires separate address logic,
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define void @f9(<16 x i8> %val, <16 x i8> *%base) {
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; CHECK-LABEL: f9:
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; CHECK: aghi %r2, 4096
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; CHECK: vst %v24, 0(%r2)
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; CHECK: br %r14
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%ptr = getelementptr <16 x i8>, <16 x i8> *%base, i64 256
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store <16 x i8> %val, <16 x i8> *%ptr
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ret void
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}
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; Test negative offsets, which also require separate address logic,
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define void @f10(<16 x i8> %val, <16 x i8> *%base) {
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; CHECK-LABEL: f10:
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; CHECK: aghi %r2, -16
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; CHECK: vst %v24, 0(%r2)
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; CHECK: br %r14
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%ptr = getelementptr <16 x i8>, <16 x i8> *%base, i64 -1
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store <16 x i8> %val, <16 x i8> *%ptr
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ret void
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}
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; Check that indexes are allowed.
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define void @f11(<16 x i8> %val, i8 *%base, i64 %index) {
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; CHECK-LABEL: f11:
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; CHECK: vst %v24, 0(%r3,%r2)
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; CHECK: br %r14
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%addr = getelementptr i8, i8 *%base, i64 %index
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%ptr = bitcast i8 *%addr to <16 x i8> *
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store <16 x i8> %val, <16 x i8> *%ptr, align 1
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ret void
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}
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