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The presence of a ReadAdvance for input operand #0 is problematic because it changes the input latency of the register used as the base address for the folded load. A broadcast cannot start executing if the load address hasn't been computed yet. In the llvm-mca example, the VBROADCASTSS is dependent on the address generated by the LEAQ. That means, it cannot start until LEAQ reaches the write-back stage. If we apply ReadAdvance, then we wrongly assume that the load can start 3 cycles in advance. Differential Revision: https://reviews.llvm.org/D51534 llvm-svn: 341222 |
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