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llvm-mirror/test/CodeGen/AMDGPU/vop-shrink-frame-index.mir
Matt Arsenault 6705a324ed AMDGPU: Rename add/sub with carry out instructions
The hardware has created a real mess in the naming for add/sub, which
have been renamed basically every generation. Switch the carry out
pseudos to have the gfx9/gfx10 names. We were using the original SI/CI
v_add_i32/v_sub_i32 names. Later targets reintroduced these names as
carryless instructions with a saturating clamp bit, which we do not
define. Do this rename so we can unambiguously add these missing
instructions.

The carry-in versions should also be renamed, but at least those had a
consistent _u32 name to begin with. The 16-bit instructions were also
renamed, but aren't ambiguous.

This does regress assembler error message quality in some cases. In
mismatched wave32/wave64 situations, this will switch from
"unsupported instruction" to "invalid operand", with the error
pointing at the wrong position. I couldn't quite follow how the
assembler selects these, but the previous behavior seemed accidental
to me. It looked like there was a partial attempt to handle this which
was never completed (i.e. there is an AMDGPUOperand::isBoolReg but it
isn't used for anything).
2020-07-16 13:16:30 -04:00

162 lines
5.1 KiB
YAML

# RUN: llc -march=amdgcn -verify-machineinstrs -run-pass si-shrink-instructions -o - %s | FileCheck -check-prefix=GCN %s
--- |
define amdgpu_kernel void @fold_fi_vgpr() {
%alloca = alloca [4 x i32], addrspace(5)
ret void
}
define amdgpu_kernel void @fold_vgpr_fi() {
%alloca = alloca [4 x i32], addrspace(5)
ret void
}
define amdgpu_kernel void @fold_sgpr_fi() {
%alloca = alloca [4 x i32], addrspace(5)
ret void
}
define amdgpu_kernel void @fold_fi_sgpr() {
%alloca = alloca [4 x i32], addrspace(5)
ret void
}
define amdgpu_kernel void @fold_fi_imm() {
%alloca = alloca [4 x i32], addrspace(5)
ret void
}
define amdgpu_kernel void @fold_imm_fi() {
%alloca = alloca [4 x i32], addrspace(5)
ret void
}
...
# GCN-LABEL: name: fold_fi_vgpr{{$}}
# GCN: %1:vgpr_32 = IMPLICIT_DEF
# GCN: %2:vgpr_32 = V_ADD_CO_U32_e32 %stack.0.alloca, %1, implicit-def $vcc, implicit $exec
name: fold_fi_vgpr
tracksRegLiveness: true
registers:
- { id: 0, class: vgpr_32 }
- { id: 1, class: vgpr_32 }
- { id: 2, class: vgpr_32 }
stack:
- { id: 0, name: alloca, type: default, offset: 0, size: 128, alignment: 8,
callee-saved-register: '', local-offset: 0, debug-info-variable: '',
debug-info-expression: '', debug-info-location: '' }
body: |
bb.0:
%0 = V_MOV_B32_e32 %stack.0.alloca, implicit $exec
%1 = IMPLICIT_DEF
%2, $vcc = V_ADD_CO_U32_e64 %0, %1, 0, implicit $exec
S_ENDPGM 0
...
# GCN-LABEL: name: fold_vgpr_fi{{$}}
# GCN: %1:vgpr_32 = IMPLICIT_DEF
# GCN: %2:vgpr_32 = V_ADD_CO_U32_e32 %stack.0.alloca, %1, implicit-def $vcc, implicit $exec
name: fold_vgpr_fi
tracksRegLiveness: true
registers:
- { id: 0, class: vgpr_32 }
- { id: 1, class: vgpr_32 }
- { id: 2, class: vgpr_32 }
stack:
- { id: 0, name: alloca, type: default, offset: 0, size: 128, alignment: 8,
callee-saved-register: '', local-offset: 0, debug-info-variable: '',
debug-info-expression: '', debug-info-location: '' }
body: |
bb.0:
%0 = V_MOV_B32_e32 %stack.0.alloca, implicit $exec
%1 = IMPLICIT_DEF
%2, $vcc = V_ADD_CO_U32_e64 %1, %0, 0, implicit $exec
S_ENDPGM 0
...
# GCN-LABEL: name: fold_sgpr_fi{{$}}
# GCN: %0:vgpr_32 = V_MOV_B32_e32 %stack.0.alloca, implicit $exec
# GCN: %1:sgpr_32 = IMPLICIT_DEF
# GCN: %2:vgpr_32 = V_ADD_CO_U32_e32 %1, %0, implicit-def $vcc, implicit $exec
name: fold_sgpr_fi
tracksRegLiveness: true
registers:
- { id: 0, class: vgpr_32 }
- { id: 1, class: sgpr_32 }
- { id: 2, class: vgpr_32 }
stack:
- { id: 0, name: alloca, type: default, offset: 0, size: 128, alignment: 8,
callee-saved-register: '', local-offset: 0, debug-info-variable: '',
debug-info-expression: '', debug-info-location: '' }
body: |
bb.0:
%0 = V_MOV_B32_e32 %stack.0.alloca, implicit $exec
%1 = IMPLICIT_DEF
%2, $vcc = V_ADD_CO_U32_e64 %1, %0, 0, implicit $exec
S_ENDPGM 0
...
# GCN-LABEL: name: fold_fi_sgpr{{$}}
# GCN: %0:vgpr_32 = V_MOV_B32_e32 %stack.0.alloca, implicit $exec
# GCN: %1:sgpr_32 = IMPLICIT_DEF
# GCN: %2:vgpr_32 = V_ADD_CO_U32_e32 %1, %0, implicit-def $vcc, implicit $exec
name: fold_fi_sgpr
tracksRegLiveness: true
registers:
- { id: 0, class: vgpr_32 }
- { id: 1, class: sgpr_32 }
- { id: 2, class: vgpr_32 }
stack:
- { id: 0, name: alloca, type: default, offset: 0, size: 128, alignment: 8,
callee-saved-register: '', local-offset: 0, debug-info-variable: '',
debug-info-expression: '', debug-info-location: '' }
body: |
bb.0:
%0 = V_MOV_B32_e32 %stack.0.alloca, implicit $exec
%1 = IMPLICIT_DEF
%2, $vcc = V_ADD_CO_U32_e64 %0, %1, 0, implicit $exec
S_ENDPGM 0
...
# TODO: Should probably prefer folding immediate first
# GCN-LABEL: name: fold_fi_imm{{$}}
# GCN: %1:vgpr_32 = V_MOV_B32_e32 999, implicit $exec
# GCN: %2:vgpr_32 = V_ADD_CO_U32_e32 %stack.0.alloca, %1, implicit-def $vcc, implicit $exec
name: fold_fi_imm
tracksRegLiveness: true
registers:
- { id: 0, class: vgpr_32 }
- { id: 1, class: vgpr_32 }
- { id: 2, class: vgpr_32 }
stack:
- { id: 0, name: alloca, type: default, offset: 0, size: 128, alignment: 8,
callee-saved-register: '', local-offset: 0, debug-info-variable: '',
debug-info-expression: '', debug-info-location: '' }
body: |
bb.0:
%0 = V_MOV_B32_e32 %stack.0.alloca, implicit $exec
%1 = V_MOV_B32_e32 999, implicit $exec
%2, $vcc = V_ADD_CO_U32_e64 %0, %1, 0, implicit $exec
S_ENDPGM 0
...
# GCN-LABEL: name: fold_imm_fi{{$}}
# GCN: %0:vgpr_32 = V_MOV_B32_e32 %stack.0.alloca, implicit $exec
# GCN: %2:vgpr_32 = V_ADD_CO_U32_e32 999, %0, implicit-def $vcc, implicit $exec
name: fold_imm_fi
tracksRegLiveness: true
registers:
- { id: 0, class: vgpr_32 }
- { id: 1, class: vgpr_32 }
- { id: 2, class: vgpr_32 }
stack:
- { id: 0, name: alloca, type: default, offset: 0, size: 128, alignment: 8,
callee-saved-register: '', local-offset: 0, debug-info-variable: '',
debug-info-expression: '', debug-info-location: '' }
body: |
bb.0:
%0 = V_MOV_B32_e32 %stack.0.alloca, implicit $exec
%1 = V_MOV_B32_e32 999, implicit $exec
%2, $vcc = V_ADD_CO_U32_e64 %1, %0, 0, implicit $exec
S_ENDPGM 0