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262321d1ff
This patch lets the llvm tools handle the new HVX target features that
are added by frontend (clang). The target-features are of the form
"hvx-length64b" for 64 Byte HVX mode, "hvx-length128b" for 128 Byte mode HVX.
"hvx-double" is an alias to "hvx-length128b" and is soon will be deprecated.
The hvx version target feature is upgated form "+hvx" to "+hvxv{version_number}.
Eg: "+hvxv62"
For the correct HVX code generation, the user must use the following
target features.
For 64B mode: "+hvxv62" "+hvx-length64b"
For 128B mode: "+hvxv62" "+hvx-length128b"
Clang picks a default length if none is specified. If for some reason,
no hvx-length is specified to llvm, the compilation will bail out.
There is a corresponding clang patch.
Differential Revision: https://reviews.llvm.org/D38851
llvm-svn: 316101
80 lines
2.4 KiB
LLVM
80 lines
2.4 KiB
LLVM
; RUN: llc -march=hexagon < %s
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; REQUIRES: asserts
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; This code causes multiple endloop instructions to be generated for the
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; same loop. The findLoopInstr would encounter for one endloop would encounter
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; the other endloop, and return null in response. This resulted in a crash.
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;
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; Check that with the fix we are able to compile this code successfully.
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target triple = "hexagon"
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; Function Attrs: norecurse
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define void @fred() local_unnamed_addr #0 align 2 {
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b0:
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br label %b7
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b1: ; preds = %b9
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br i1 undef, label %b4, label %b2
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b2: ; preds = %b1
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%v3 = sub i32 undef, undef
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br label %b4
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b4: ; preds = %b2, %b1
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%v5 = phi i32 [ undef, %b1 ], [ %v3, %b2 ]
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br i1 undef, label %b14, label %b6
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b6: ; preds = %b4
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br label %b10
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b7: ; preds = %b0
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br i1 undef, label %b9, label %b8
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b8: ; preds = %b7
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unreachable
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b9: ; preds = %b7
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br label %b1
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b10: ; preds = %b21, %b6
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%v11 = phi i32 [ %v22, %b21 ], [ %v5, %b6 ]
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br i1 undef, label %b21, label %b12
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b12: ; preds = %b10
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br label %b15
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b13: ; preds = %b21
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br label %b14
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b14: ; preds = %b13, %b4
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ret void
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b15: ; preds = %b12
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br i1 undef, label %b16, label %b17
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b16: ; preds = %b15
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store i32 0, i32* undef, align 4
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br label %b21
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b17: ; preds = %b15
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br label %b18
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b18: ; preds = %b17
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br i1 undef, label %b19, label %b20
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b19: ; preds = %b18
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br label %b21
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b20: ; preds = %b18
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store i32 0, i32* undef, align 4
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br label %b21
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b21: ; preds = %b20, %b19, %b16, %b10
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%v22 = add i32 %v11, -8
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%v23 = icmp eq i32 %v22, 0
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br i1 %v23, label %b13, label %b10
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}
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attributes #0 = { norecurse "target-cpu"="hexagonv60" "target-features"="-hvx,-long-calls" }
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