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llvm-mirror/test/CodeGen/Hexagon/newvaluestore.ll
Krzysztof Parzyszek 871650f3b5 [Hexagon] Enable the post-RA scheduler
The aggressive anti-dependency breaker can rename the restored callee-
saved registers. To prevent this, mark these registers are live on all
paths to the return/tail-call instructions, and add implicit use operands
for them to these instructions.

llvm-svn: 270898
2016-05-26 19:44:28 +00:00

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LLVM

; RUN: llc -march=hexagon < %s | FileCheck %s
; Check that we generate new value store.
@i = global i32 0, align 4
define i32 @main(i32 %x, i32* %p) nounwind {
entry:
; CHECK: memw(r{{[0-9]+}}+#{{[0-9]+}}) = r{{[0-9]+}}.new
%t0 = load i32, i32* @i, align 4
store i32 %t0, i32* %p, align 4
ret i32 %x
}