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llvm-mirror/test/CodeGen/WebAssembly
Heejin Ahn bcac389fb2 [WebAssembly] Fix fixEndsAtEndOfFunction for try-catch
When the function return type is non-void and `end` instructions are at
the very end of a function, CFGStackify's `fixEndsAtEndOfFunction`
function fixes the corresponding block/loop/try's type to match the
function's return type. This is applied to consecutive `end` markers at
the end of a function. For example, when the function return type is
`i32`,
```
block i32    ;; return type is fixed to i32
  ...
  loop i32   ;; return type is fixed to i32
    ...
  end_loop
end_block
end_function
```

But try-catch is a little different, because it consists of two parts:
a try part and a catch part, and both parts' return type should satisfy
the function's return type. Which means,
```
try i32      ;; return type is fixed to i32
  ...
  block i32  ;; this should be changed i32 too!
    ...
  end_block
catch
  ...
end_try
end_function
```
As you can see in this example, it is not sufficient to only `end`
instructions at the end of a function; in case of `try`, we should
check instructions before `catch`es, in case their corresponding `try`'s
type has been fixed.

This changes `fixEndsAtEndOfFunction`'s algorithm to use a worklist
that contains a reverse iterator, each of which is a starting point for
a new backward `end` instruction search.

Fixes https://bugs.llvm.org/show_bug.cgi?id=47413.

Reviewed By: dschuff, tlively

Differential Revision: https://reviews.llvm.org/D87207
2020-09-08 09:27:40 -07:00
..
add-prototypes-conflict.ll
add-prototypes.ll
address-offsets.ll
aliases.ll [WebAssembly] MC: Fix for data aliases with offsets (getelementptr) 2020-06-17 16:25:50 -07:00
atomic-fence.ll
atomic-fence.mir [WebAssembly] Adding 64-bit versions of all load & store ops. 2020-06-15 08:31:56 -07:00
atomic-mem-consistency.ll
atomic-rmw.ll
bulk-memory64.ll [WebAssembly] Added 64-bit memory.grow/size/copy/fill 2020-07-06 12:49:50 -07:00
bulk-memory.ll
byval.ll
call-pic.ll
call.ll
cfg-stackify-dbg-skip.ll
cfg-stackify-dbg.mir
cfg-stackify-eh.ll [WebAssembly] Fix fixEndsAtEndOfFunction for try-catch 2020-09-08 09:27:40 -07:00
cfg-stackify.ll Reland "[WebAssembly] Eliminate range checks on br_tables" 2020-06-03 14:04:59 -07:00
cfi.ll
clear-cache.ll
comparisons-f32.ll
comparisons-f64.ll
comparisons-i32.ll
comparisons-i64.ll
conv-trap.ll
conv.ll
copysign-casts.ll
cpus.ll [WebAssembly] Adding 64-bit versions of all load & store ops. 2020-06-15 08:31:56 -07:00
custom-sections.ll
dbgvalue.ll
dead-vreg.ll
debugtest-opt.ll
debugtrap.ll [WebAssembly] Lower llvm.debugtrap properly 2020-06-04 13:25:10 -07:00
divrem-constant.ll
eh-labels.mir Simplify MachineVerifier's block-successor verification. 2020-06-06 22:30:51 -04:00
eh-lsda.ll
exception.ll [WebAssembly] Fix a bug in finding matching EH pad 2020-05-28 19:46:11 -07:00
explicit-locals.mir
export-name.ll
f16.ll
f32.ll
f64.ll
fast-isel-br-i1.ll
fast-isel-i24.ll
fast-isel-i256.ll
fast-isel-noreg.ll
fast-isel-pr47040.ll [WebAssembly] Fix FastISel address calculation bug 2020-08-08 15:23:11 -07:00
fast-isel.ll
frem.ll
fshl.ll [SelectionDAG] Handle non-power-of-2 bitwidths in expandROT 2020-08-26 09:20:46 +01:00
func.ll
function-bitcasts-varargs.ll
function-bitcasts.ll
function-info.mir
function-pointer64.ll [WebAssembly] 64-bit (function) pointer fixes. 2020-07-16 14:10:22 -07:00
global_dtors.ll
global.ll
globl.ll
i32-load-store-alignment.ll
i32.ll
i64-load-store-alignment.ll
i64.ll
i128-returned.ll
i128.ll
ident.ll
immediates.ll
implicit-def.ll
import-module.ll
indirect-import.ll
indirectbr.ll [WebAssembly] Make BR_TABLE non-duplicable 2020-06-11 15:11:45 -07:00
inline-asm-m.ll
inline-asm-roundtrip.ll
inline-asm.ll
inlineasm-output-template.ll
irreducible-cfg-exceptions.ll
irreducible-cfg.ll
irreducible-cfg.mir
legalize.ll
libcalls.ll
lit.local.cfg
llround-conv-i32.ll
load-ext-atomic.ll [WebAssembly] Adding 64-bit versions of all load & store ops. 2020-06-15 08:31:56 -07:00
load-ext.ll [WebAssembly] Adding 64-bit versions of all load & store ops. 2020-06-15 08:31:56 -07:00
load-store-i1.ll [WebAssembly] Adding 64-bit versions of all load & store ops. 2020-06-15 08:31:56 -07:00
load-store-pic.ll
load.ll [WebAssembly] Adding 64-bit versions of all load & store ops. 2020-06-15 08:31:56 -07:00
lower-em-ehsjlj-options.ll
lower-em-exceptions-allowed.ll [Target] As part of using inclusive language within the llvm project, 2020-06-20 00:06:39 -07:00
lower-em-exceptions-resume-only.ll
lower-em-exceptions.ll
lower-em-sjlj-alias.ll
lower-em-sjlj-debuginfo.ll
lower-em-sjlj-sret.ll
lower-em-sjlj.ll
lower-global-dtors.ll
main-declaration.ll
main-no-args.ll
main-three-args.ll
main-with-args.ll
mem-intrinsics.ll
memory-addr32.ll
memory-addr64.ll [WebAssembly] Added 64-bit memory.grow/size/copy/fill 2020-07-06 12:49:50 -07:00
muloti4.ll
multi-return.ll
multivalue-stackify.ll
multivalue-stackify.py
multivalue.ll
mutable-globals.ll
negative-base-reg.ll
null-streamer.ll
offset-atomics.ll
offset-fastisel.ll
offset-folding.ll
offset.ll
phi.ll
pr47375.ll [WebAssembly] Fix incorrect assumption of simple value types 2020-09-06 15:42:21 -07:00
PR40172.ll
PR40267.ll
PR41149.ll
PR41841.ll
reference-types.ll
reg-argument.mir
reg-copy.mir
reg-stackify.ll [DAGCombiner] Rebuild (setcc x, y, ==) from (xor (xor x, y), 1) 2020-07-15 07:34:22 +00:00
return-address-emscripten.ll
return-address-unknown.ll
return-int32.ll
return-void.ll
returned.ll
select.ll
signext-arg.ll
signext-inreg.ll
signext-zeroext.ll
simd-arith.ll [WebAssembly] Prefer v128.const for constant splats 2020-07-10 18:27:52 -07:00
simd-bitcasts.ll
simd-build-pair.ll
simd-build-vector.ll
simd-comparisons.ll
simd-conversions.ll
simd-extended-extract.ll
simd-illegal-signext.ll
simd-intrinsics.ll [WebAssembly] Remove intrinsics for SIMD widening ops 2020-07-28 18:25:55 -07:00
simd-load-splat.ll
simd-load-store-alignment.ll [NFC][WebAssembly] Add tests for alignment on new SIMD loads 2020-06-09 13:46:12 -07:00
simd-load-zero-offset.ll [WebAssembly] Implement prototype v128.load{32,64}_zero instructions 2020-08-03 13:54:00 -07:00
simd-nested-shuffles.ll
simd-nonconst-sext.ll [WebAssembly] Fix ISel crash in SIGN_EXTEND_INREG lowering 2020-06-03 15:36:44 -07:00
simd-noopt.ll
simd-offset.ll [WebAssembly] Implement truncating vector stores 2020-07-28 17:46:45 -07:00
simd-reductions.ll
simd-scalar-to-vector.ll
simd-select.ll [WebAssembly] Implement v128.select 2020-07-16 11:37:25 -07:00
simd-sext-inreg.ll
simd-shift-complex-splats.ll [WebAssembly][NFC] Simplify vector shift lowering and add tests 2020-07-10 00:18:59 -07:00
simd-shuffle-bitcast.ll [NFC] Fix typo in triples from unkown to unknown 2020-07-02 16:21:54 +08:00
simd-unsupported.ll
simd-widening.ll [WebAssembly] Remove intrinsics for SIMD widening ops 2020-07-28 18:25:55 -07:00
simd.ll [WebAssembly] Prefer v128.const for constant splats 2020-07-10 18:27:52 -07:00
stack-alignment.ll [WebAssembly] Adding 64-bit versions of __stack_pointer and other globals 2020-06-25 15:52:44 -07:00
stack-insts.ll Reland "[WebAssembly] Eliminate range checks on br_tables" 2020-06-03 14:04:59 -07:00
stack-protector.ll [WebAssembly] Generate unreachable after __stack_chk_fail 2020-07-08 01:02:05 -07:00
stackified-debug.ll
store-trunc-atomic.ll [WebAssembly] Adding 64-bit versions of all load & store ops. 2020-06-15 08:31:56 -07:00
store-trunc.ll [WebAssembly] Adding 64-bit versions of all load & store ops. 2020-06-15 08:31:56 -07:00
store.ll [WebAssembly] Adding 64-bit versions of all load & store ops. 2020-06-15 08:31:56 -07:00
swiftcc.ll
switch-in-loop.ll [WebAssembly] Make BR_TABLE non-duplicable 2020-06-11 15:11:45 -07:00
switch-unreachable-default.ll [WebAssembly] Fix bug in FixBrTables and use branch analysis utils 2020-06-17 12:34:45 -07:00
switch.ll [WebAssembly] Fixed 64-bit indices in br_table 2020-07-30 10:52:16 -07:00
tailcall.ll
target-features-tls.ll
target-features.ll
tls-general-dynamic.ll
tls-local-exec.ll
umulo-128-legalisation-lowering.ll
umulo-i64.ll
unreachable.ll
unsupported-function-bitcasts.ll
unused-argument.ll
userstack.ll [WebAssembly] Adding 64-bit versions of __stack_pointer and other globals 2020-06-25 15:52:44 -07:00
varargs.ll
vector-sdiv.ll
vtable.ll
wasmehprepare.ll