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llvm-mirror/test/MC/X86/avx512-err.s
Wang, Pengfei 48ab1244bc [X86][llvm-mc] Make the suffix matcher more accurate.
Summary:
Some instruction like VPMULDQ is NOT the variant of VPMULD but a new
one.
So we should make sure the suffix matcher only works for memory variant
that has the same size with the suffix.
Currently we only check for SSE/AVX* instructions, because many legacy
instructions didn't declare the alias instructions of their variants.

Differential Revision: https://reviews.llvm.org/D80608
2020-05-27 14:45:17 +08:00

23 lines
674 B
ArmAsm

// RUN: not llvm-mc %s -triple x86_64-unknown-unknown --show-encoding -o /dev/null 2>&1 | FileCheck --check-prefix=ERR %s
// ERR: Register k0 can't be used as write mask
vpcmpd $1, %zmm24, %zmm7, %k5{%k0}
// ERR: Expected a {z} mark at this point
vfmsub213ps %zmm8, %zmm8, %zmm8{%k2} {rn-sae}
// ERR: Expected an op-mask register at this point
vfmsub213ps %zmm8, %zmm8, %zmm8 {rn-sae}
// ERR: invalid operand for instruction
cvtsd2sil {rn-sae}, %xmm1, %eax
// ERR: Expected an identifier after {
cvtsd2sil {{sae}, %xmm1, %eax
// ERR: invalid instruction mnemonic 'vpmuld'
vpmuld %xmm1, %xmm2, %xmm3
// ERR: invalid instruction mnemonic 'maskmov'
maskmov %mm1, %mm2