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to reflect the new license. We understand that people may be surprised that we're moving the header entirely to discuss the new license. We checked this carefully with the Foundation's lawyer and we believe this is the correct approach. Essentially, all code in the project is now made available by the LLVM project under our new license, so you will see that the license headers include that license only. Some of our contributors have contributed code under our old license, and accordingly, we have retained a copy of our old license notice in the top-level files in each project and repository. llvm-svn: 351636
86 lines
2.9 KiB
C++
86 lines
2.9 KiB
C++
//===- MipsRegisterInfo.h - Mips Register Information Impl ------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the Mips implementation of the TargetRegisterInfo class.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_MIPS_MIPSREGISTERINFO_H
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#define LLVM_LIB_TARGET_MIPS_MIPSREGISTERINFO_H
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#include "Mips.h"
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#include "llvm/CodeGen/MachineBasicBlock.h"
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#include <cstdint>
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#define GET_REGINFO_HEADER
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#include "MipsGenRegisterInfo.inc"
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namespace llvm {
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class TargetRegisterClass;
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class MipsRegisterInfo : public MipsGenRegisterInfo {
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public:
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enum class MipsPtrClass {
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/// The default register class for integer values.
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Default = 0,
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/// The subset of registers permitted in certain microMIPS instructions
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/// such as lw16.
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GPR16MM = 1,
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/// The stack pointer only.
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StackPointer = 2,
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/// The global pointer only.
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GlobalPointer = 3,
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};
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MipsRegisterInfo();
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/// Get PIC indirect call register
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static unsigned getPICCallReg();
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/// Code Generation virtual methods...
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const TargetRegisterClass *getPointerRegClass(const MachineFunction &MF,
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unsigned Kind) const override;
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unsigned getRegPressureLimit(const TargetRegisterClass *RC,
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MachineFunction &MF) const override;
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const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override;
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const uint32_t *getCallPreservedMask(const MachineFunction &MF,
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CallingConv::ID) const override;
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static const uint32_t *getMips16RetHelperMask();
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BitVector getReservedRegs(const MachineFunction &MF) const override;
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bool requiresRegisterScavenging(const MachineFunction &MF) const override;
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bool trackLivenessAfterRegAlloc(const MachineFunction &MF) const override;
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/// Stack Frame Processing Methods
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void eliminateFrameIndex(MachineBasicBlock::iterator II,
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int SPAdj, unsigned FIOperandNum,
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RegScavenger *RS = nullptr) const override;
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// Stack realignment queries.
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bool canRealignStack(const MachineFunction &MF) const override;
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/// Debug information queries.
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unsigned getFrameRegister(const MachineFunction &MF) const override;
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/// Return GPR register class.
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virtual const TargetRegisterClass *intRegClass(unsigned Size) const = 0;
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private:
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virtual void eliminateFI(MachineBasicBlock::iterator II, unsigned OpNo,
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int FrameIndex, uint64_t StackSize,
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int64_t SPOffset) const = 0;
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};
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} // end namespace llvm
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#endif // LLVM_LIB_TARGET_MIPS_MIPSREGISTERINFO_H
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