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4033a61f5d
The current implementation of skip insertion (SIInsertSkip) makes it a mandatory pass required for correctness. Initially, the idea was to have an optional pass. This patch inserts the s_cbranch_execz upfront during SILowerControlFlow to skip over the sections of code when no lanes are active. Later, SIRemoveShortExecBranches removes the skips for short branches, unless there is a sideeffect and the skip branch is really necessary. This new pass will replace the handling of skip insertion in the existing SIInsertSkip Pass. Differential revision: https://reviews.llvm.org/D68092
55 lines
1.1 KiB
YAML
55 lines
1.1 KiB
YAML
# RUN: llc -mtriple=amdgcn-amd-amdhsa -run-pass si-insert-skips -amdgpu-skip-threshold-legacy=2 %s -o - | FileCheck %s
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---
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# CHECK-LABEL: name: no_count_mask_branch_pseudo
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# CHECK: $vgpr1 = V_MOV_B32_e32 7, implicit $exec
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# CHECK-NEXT: SI_MASK_BRANCH
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# CHECK-NOT: S_CBRANCH_EXECZ
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name: no_count_mask_branch_pseudo
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body: |
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bb.0:
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successors: %bb.1
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$vgpr1 = V_MOV_B32_e32 7, implicit $exec
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SI_MASK_BRANCH %bb.2, implicit $exec
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bb.1:
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successors: %bb.2
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$vgpr0 = V_MOV_B32_e32 0, implicit $exec
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SI_MASK_BRANCH %bb.3, implicit $exec
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bb.2:
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$vgpr0 = V_MOV_B32_e32 1, implicit $exec
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bb.3:
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S_ENDPGM 0
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...
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---
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# CHECK-LABEL: name: no_count_dbg_value
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# CHECK: $vgpr1 = V_MOV_B32_e32 7, implicit $exec
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# CHECK-NEXT: SI_MASK_BRANCH
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# CHECK-NOT: S_CBRANCH_EXECZ
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name: no_count_dbg_value
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body: |
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bb.0:
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successors: %bb.1
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$vgpr1 = V_MOV_B32_e32 7, implicit $exec
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SI_MASK_BRANCH %bb.2, implicit $exec
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bb.1:
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successors: %bb.2
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$vgpr0 = V_MOV_B32_e32 0, implicit $exec
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DBG_VALUE
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bb.2:
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$vgpr0 = V_MOV_B32_e32 1, implicit $exec
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bb.3:
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S_ENDPGM 0
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...
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