1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-23 19:23:23 +01:00
llvm-mirror/test/CodeGen/X86/membarrier.ll
2020-06-04 08:34:25 -04:00

21 lines
557 B
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-- -mattr=-sse -O0 | FileCheck %s
; PR9675
define i32 @t() {
; CHECK-LABEL: t:
; CHECK: # %bb.0:
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: movl $1, -{{[0-9]+}}(%rsp)
; CHECK-NEXT: mfence
; CHECK-NEXT: lock decl -{{[0-9]+}}(%rsp)
; CHECK-NEXT: mfence
; CHECK-NEXT: retq
%i = alloca i32, align 4
store i32 1, i32* %i, align 4
fence seq_cst
%t0 = atomicrmw sub i32* %i, i32 1 monotonic
fence seq_cst
ret i32 0
}