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d654e7d40c
Enable enableMultipleCopyHints() on X86. Original Patch by @jonpa: While enabling the mischeduler for SystemZ, it was discovered that for some reason a test needed one extra seemingly needless COPY (test/CodeGen/SystemZ/call-03.ll). The handling for that is resulted in this patch, which improves the register coalescing by providing not just one copy hint, but a sorted list of copy hints. On SystemZ, this gives ~12500 less register moves on SPEC, as well as marginally less spilling. Instead of improving just the SystemZ backend, the improvement has been implemented in common-code (calculateSpillWeightAndHint(). This gives a lot of test failures, but since this should be a general improvement I hope that the involved targets will help and review the test updates. Differential Revision: https://reviews.llvm.org/D38128 llvm-svn: 342578
59 lines
1.3 KiB
LLVM
59 lines
1.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
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define zeroext i1 @f1(i8* %x) {
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; CHECK-LABEL: f1:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: movb (%rdi), %al
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; CHECK-NEXT: retq
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entry:
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%0 = load i8, i8* %x, align 1, !range !0
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%tobool = trunc i8 %0 to i1
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ret i1 %tobool
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}
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define zeroext i1 @f2(i8* %x) {
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; CHECK-LABEL: f2:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: movb (%rdi), %al
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; CHECK-NEXT: retq
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entry:
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%0 = load i8, i8* %x, align 1, !range !0
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%tobool = icmp ne i8 %0, 0
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ret i1 %tobool
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}
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!0 = !{i8 0, i8 2}
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; check that we don't build a "trunc" from i1 to i1, which would assert.
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define zeroext i1 @f3(i1 %x) {
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; CHECK-LABEL: f3:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: movl %edi, %eax
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; CHECK-NEXT: andb $1, %al
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; CHECK-NEXT: ## kill: def $al killed $al killed $eax
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; CHECK-NEXT: retq
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entry:
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%tobool = icmp ne i1 %x, 0
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ret i1 %tobool
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}
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; check that we don't build a trunc when other bits are needed
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define zeroext i1 @f4(i32 %x) {
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; CHECK-LABEL: f4:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: movzwl %di, %eax
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; CHECK-NEXT: shrl $15, %eax
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; CHECK-NEXT: ## kill: def $al killed $al killed $eax
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; CHECK-NEXT: retq
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entry:
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%y = and i32 %x, 32768
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%z = icmp ne i32 %y, 0
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ret i1 %z
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}
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