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b7b3e8e261
Record internal state based on register units. This is often more efficient as there are typically fewer register units to update compared to iterating over all the aliases of a register. Original patch by Matthias Braun, but I've been rebasing and fixing it for almost 2 years and fixed a few bugs causing intermediate failures to make this patch independent of the changes in https://reviews.llvm.org/D52010.
84 lines
2.9 KiB
LLVM
84 lines
2.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -fast-isel-sink-local-values -O0 -mtriple=x86_64-unknown-linux-gnu -fast-isel-abort=1 -o - %s | FileCheck %s -check-prefix=X64
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@var_825 = external global i16, align 2
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@var_32 = external global i16, align 2
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@var_901 = external global i16, align 2
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@var_826 = external global i64, align 8
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@var_57 = external global i64, align 8
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@var_900 = external global i16, align 2
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@var_28 = external constant i64, align 8
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@var_827 = external global i16, align 2
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define void @foo() {
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; X64-LABEL: foo:
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; X64: # %bb.0: # %entry
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; X64-NEXT: xorl %eax, %eax
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; X64-NEXT: # kill: def $rax killed $eax
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; X64-NEXT: movw $0, var_825
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; X64-NEXT: movzwl var_32, %ecx
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; X64-NEXT: movzwl var_901, %edx
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; X64-NEXT: movl %ecx, %esi
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; X64-NEXT: xorl %edx, %esi
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; X64-NEXT: movl %ecx, %edx
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; X64-NEXT: xorl %esi, %edx
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; X64-NEXT: addl %ecx, %edx
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; X64-NEXT: movslq %edx, %rcx
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; X64-NEXT: movq %rcx, var_826
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; X64-NEXT: movzwl var_32, %ecx
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; X64-NEXT: # kill: def $rcx killed $ecx
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; X64-NEXT: movzwl var_901, %edx
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; X64-NEXT: xorl $51981, %edx # imm = 0xCB0D
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; X64-NEXT: movslq %edx, %rdx
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; X64-NEXT: movabsq $-1142377792914660288, %rsi # imm = 0xF02575732E06E440
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; X64-NEXT: xorq %rsi, %rdx
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; X64-NEXT: movq %rcx, %rsi
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; X64-NEXT: xorq %rdx, %rsi
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; X64-NEXT: xorq $-1, %rsi
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; X64-NEXT: xorq %rsi, %rcx
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; X64-NEXT: movq %rcx, %rdx
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; X64-NEXT: orq var_57, %rdx
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; X64-NEXT: orq %rdx, %rcx
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; X64-NEXT: # kill: def $cx killed $cx killed $rcx
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; X64-NEXT: movw %cx, var_900
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; X64-NEXT: cmpq var_28, %rax
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; X64-NEXT: setne %al
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; X64-NEXT: andb $1, %al
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; X64-NEXT: movzbl %al, %eax
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; X64-NEXT: # kill: def $ax killed $ax killed $eax
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; X64-NEXT: movw %ax, var_827
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; X64-NEXT: retq
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entry:
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store i16 0, i16* @var_825, align 2
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%v0 = load i16, i16* @var_32, align 2
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%conv = zext i16 %v0 to i32
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%v2 = load i16, i16* @var_901, align 2
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%conv2 = zext i16 %v2 to i32
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%xor = xor i32 %conv, %conv2
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%xor3 = xor i32 %conv, %xor
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%add = add nsw i32 %xor3, %conv
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%conv5 = sext i32 %add to i64
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store i64 %conv5, i64* @var_826, align 8
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%v4 = load i16, i16* @var_32, align 2
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%conv6 = zext i16 %v4 to i64
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%v6 = load i16, i16* @var_901, align 2
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%conv8 = zext i16 %v6 to i32
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%xor9 = xor i32 51981, %conv8
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%conv10 = sext i32 %xor9 to i64
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%xor11 = xor i64 -1142377792914660288, %conv10
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%xor12 = xor i64 %conv6, %xor11
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%neg = xor i64 %xor12, -1
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%xor13 = xor i64 %conv6, %neg
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%v9 = load i16, i16* @var_901, align 2
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%v10 = load i64, i64* @var_57, align 8
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%or = or i64 %xor13, %v10
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%or23 = or i64 %xor13, %or
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%conv24 = trunc i64 %or23 to i16
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store i16 %conv24, i16* @var_900, align 2
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%v11 = load i64, i64* @var_28, align 8
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%cmp = icmp ne i64 0, %v11
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%conv25 = zext i1 %cmp to i16
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store i16 %conv25, i16* @var_827, align 2
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ret void
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}
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