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llvm-mirror/test/CodeGen/X86/pr42992.ll
Craig Topper 41b64b38c5 [X86] Manually reimplement getTargetInsertSubreg in X86DAGToDAGISel::matchBitExtract so we can call insertDAGNode on the target constant.
This is needed to maintain the topological sort order.

Fixes PR42992.

llvm-svn: 369084
2019-08-16 04:47:44 +00:00

18 lines
493 B
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=bmi2 | FileCheck %s
define i32 @hoge(i32 %a) {
; CHECK-LABEL: hoge:
; CHECK: # %bb.0: # %bb
; CHECK-NEXT: movl $15, %eax
; CHECK-NEXT: bzhil %edi, %eax, %eax
; CHECK-NEXT: shll $8, %eax
; CHECK-NEXT: retq
bb:
%tmp3 = shl nsw i32 -1, %a
%tmp4 = xor i32 %tmp3, -1
%tmp5 = shl i32 %tmp4, 8
%tmp6 = and i32 %tmp5, 3840
ret i32 %tmp6
}