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1c1cc1c5ed
As announced here: http://lists.llvm.org/pipermail/llvm-dev/2019-April/131786.html Grouped option syntax (POSIX Utility Conventions) does not play well with -long-option A subsequent change will reject -long-option.
195 lines
7.0 KiB
ArmAsm
195 lines
7.0 KiB
ArmAsm
// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
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// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
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// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
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// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
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// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
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// RUN: | llvm-objdump -d --mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
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// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
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// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
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ld1b z0.b, p0/z, [x0]
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// CHECK-INST: ld1b { z0.b }, p0/z, [x0]
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// CHECK-ENCODING: [0x00,0xa0,0x00,0xa4]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 00 a0 00 a4 <unknown>
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ld1b z0.h, p0/z, [x0]
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// CHECK-INST: ld1b { z0.h }, p0/z, [x0]
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// CHECK-ENCODING: [0x00,0xa0,0x20,0xa4]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 00 a0 20 a4 <unknown>
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ld1b z0.s, p0/z, [x0]
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// CHECK-INST: ld1b { z0.s }, p0/z, [x0]
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// CHECK-ENCODING: [0x00,0xa0,0x40,0xa4]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 00 a0 40 a4 <unknown>
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ld1b z0.d, p0/z, [x0]
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// CHECK-INST: ld1b { z0.d }, p0/z, [x0]
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// CHECK-ENCODING: [0x00,0xa0,0x60,0xa4]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 00 a0 60 a4 <unknown>
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ld1b { z0.b }, p0/z, [x0]
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// CHECK-INST: ld1b { z0.b }, p0/z, [x0]
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// CHECK-ENCODING: [0x00,0xa0,0x00,0xa4]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 00 a0 00 a4 <unknown>
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ld1b { z0.h }, p0/z, [x0]
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// CHECK-INST: ld1b { z0.h }, p0/z, [x0]
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// CHECK-ENCODING: [0x00,0xa0,0x20,0xa4]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 00 a0 20 a4 <unknown>
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ld1b { z0.s }, p0/z, [x0]
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// CHECK-INST: ld1b { z0.s }, p0/z, [x0]
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// CHECK-ENCODING: [0x00,0xa0,0x40,0xa4]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 00 a0 40 a4 <unknown>
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ld1b { z0.d }, p0/z, [x0]
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// CHECK-INST: ld1b { z0.d }, p0/z, [x0]
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// CHECK-ENCODING: [0x00,0xa0,0x60,0xa4]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 00 a0 60 a4 <unknown>
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ld1b { z31.b }, p7/z, [sp, #-1, mul vl]
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// CHECK-INST: ld1b { z31.b }, p7/z, [sp, #-1, mul vl]
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// CHECK-ENCODING: [0xff,0xbf,0x0f,0xa4]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: ff bf 0f a4 <unknown>
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ld1b { z21.b }, p5/z, [x10, #5, mul vl]
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// CHECK-INST: ld1b { z21.b }, p5/z, [x10, #5, mul vl]
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// CHECK-ENCODING: [0x55,0xb5,0x05,0xa4]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 55 b5 05 a4 <unknown>
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ld1b { z31.h }, p7/z, [sp, #-1, mul vl]
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// CHECK-INST: ld1b { z31.h }, p7/z, [sp, #-1, mul vl]
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// CHECK-ENCODING: [0xff,0xbf,0x2f,0xa4]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: ff bf 2f a4 <unknown>
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ld1b { z21.h }, p5/z, [x10, #5, mul vl]
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// CHECK-INST: ld1b { z21.h }, p5/z, [x10, #5, mul vl]
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// CHECK-ENCODING: [0x55,0xb5,0x25,0xa4]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 55 b5 25 a4 <unknown>
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ld1b { z31.s }, p7/z, [sp, #-1, mul vl]
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// CHECK-INST: ld1b { z31.s }, p7/z, [sp, #-1, mul vl]
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// CHECK-ENCODING: [0xff,0xbf,0x4f,0xa4]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: ff bf 4f a4 <unknown>
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ld1b { z21.s }, p5/z, [x10, #5, mul vl]
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// CHECK-INST: ld1b { z21.s }, p5/z, [x10, #5, mul vl]
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// CHECK-ENCODING: [0x55,0xb5,0x45,0xa4]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 55 b5 45 a4 <unknown>
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ld1b { z31.d }, p7/z, [sp, #-1, mul vl]
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// CHECK-INST: ld1b { z31.d }, p7/z, [sp, #-1, mul vl]
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// CHECK-ENCODING: [0xff,0xbf,0x6f,0xa4]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: ff bf 6f a4 <unknown>
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ld1b { z21.d }, p5/z, [x10, #5, mul vl]
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// CHECK-INST: ld1b { z21.d }, p5/z, [x10, #5, mul vl]
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// CHECK-ENCODING: [0x55,0xb5,0x65,0xa4]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 55 b5 65 a4 <unknown>
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ld1b { z0.b }, p0/z, [sp, x0]
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// CHECK-INST: ld1b { z0.b }, p0/z, [sp, x0]
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// CHECK-ENCODING: [0xe0,0x43,0x00,0xa4]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: e0 43 00 a4 <unknown>
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ld1b { z0.b }, p0/z, [x0, x0]
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// CHECK-INST: ld1b { z0.b }, p0/z, [x0, x0]
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// CHECK-ENCODING: [0x00,0x40,0x00,0xa4]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 00 40 00 a4 <unknown>
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ld1b { z0.b }, p0/z, [x0, x0, lsl #0]
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// CHECK-INST: ld1b { z0.b }, p0/z, [x0, x0]
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// CHECK-ENCODING: [0x00,0x40,0x00,0xa4]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 00 40 00 a4 <unknown>
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ld1b { z5.h }, p3/z, [x17, x16]
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// CHECK-INST: ld1b { z5.h }, p3/z, [x17, x16]
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// CHECK-ENCODING: [0x25,0x4e,0x30,0xa4]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 25 4e 30 a4 <unknown>
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ld1b { z21.s }, p5/z, [x10, x21]
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// CHECK-INST: ld1b { z21.s }, p5/z, [x10, x21]
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// CHECK-ENCODING: [0x55,0x55,0x55,0xa4]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 55 55 55 a4 <unknown>
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ld1b { z23.d }, p3/z, [x13, x8]
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// CHECK-INST: ld1b { z23.d }, p3/z, [x13, x8]
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// CHECK-ENCODING: [0xb7,0x4d,0x68,0xa4]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: b7 4d 68 a4 <unknown>
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ld1b { z0.s }, p0/z, [x0, z0.s, uxtw]
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// CHECK-INST: ld1b { z0.s }, p0/z, [x0, z0.s, uxtw]
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// CHECK-ENCODING: [0x00,0x40,0x00,0x84]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 00 40 00 84 <unknown>
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ld1b { z0.s }, p0/z, [x0, z0.s, sxtw]
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// CHECK-INST: ld1b { z0.s }, p0/z, [x0, z0.s, sxtw]
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// CHECK-ENCODING: [0x00,0x40,0x40,0x84]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 00 40 40 84 <unknown>
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ld1b { z31.d }, p7/z, [sp, z31.d]
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// CHECK-INST: ld1b { z31.d }, p7/z, [sp, z31.d]
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// CHECK-ENCODING: [0xff,0xdf,0x5f,0xc4]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: ff df 5f c4 <unknown>
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ld1b { z21.d }, p5/z, [x10, z21.d, uxtw]
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// CHECK-INST: ld1b { z21.d }, p5/z, [x10, z21.d, uxtw]
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// CHECK-ENCODING: [0x55,0x55,0x15,0xc4]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 55 55 15 c4 <unknown>
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ld1b { z21.d }, p5/z, [x10, z21.d, sxtw]
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// CHECK-INST: ld1b { z21.d }, p5/z, [x10, z21.d, sxtw]
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// CHECK-ENCODING: [0x55,0x55,0x55,0xc4]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 55 55 55 c4 <unknown>
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ld1b { z31.s }, p7/z, [z31.s, #31]
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// CHECK-INST: ld1b { z31.s }, p7/z, [z31.s, #31]
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// CHECK-ENCODING: [0xff,0xdf,0x3f,0x84]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: ff df 3f 84 <unknown>
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ld1b { z0.s }, p0/z, [z0.s]
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// CHECK-INST: ld1b { z0.s }, p0/z, [z0.s]
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// CHECK-ENCODING: [0x00,0xc0,0x20,0x84]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 00 c0 20 84 <unknown>
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ld1b { z31.d }, p7/z, [z31.d, #31]
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// CHECK-INST: ld1b { z31.d }, p7/z, [z31.d, #31]
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// CHECK-ENCODING: [0xff,0xdf,0x3f,0xc4]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: ff df 3f c4 <unknown>
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ld1b { z0.d }, p0/z, [z0.d]
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// CHECK-INST: ld1b { z0.d }, p0/z, [z0.d]
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// CHECK-ENCODING: [0x00,0xc0,0x20,0xc4]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 00 c0 20 c4 <unknown>
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