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llvm-mirror/test/MC/Disassembler/ARM/thumbv8.1m-vmrs-vmsr.txt
Simon Tatham f5744d66e0 [ARM] Add the non-MVE instructions in Arm v8.1-M.
This adds support for the new family of conditional selection /
increment / negation instructions; the low-overhead branch
instructions (e.g. BF, WLS, DLS); the CLRM instruction to zero a whole
list of registers at once; the new VMRS/VMSR and VLDR/VSTR
instructions to get data in and out of 8.1-M system registers,
particularly including the new VPR register used by MVE vector
predication.

To support this, we also add a register name 'zr' (used by the CSEL
family to force one of the inputs to the constant 0), and operand
types for lists of registers that are also allowed to include APSR or
VPR (used by CLRM). The VLDR/VSTR instructions also need a new
addressing mode.

The low-overhead branch instructions exist in their own separate
architecture extension, which we treat as enabled by default, but you
can say -mattr=-lob or equivalent to turn it off.

Reviewers: dmgreen, samparker, SjoerdMeijer, t.p.northover

Reviewed By: samparker

Subscribers: miyuki, javed.absar, kristof.beyls, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D62667

llvm-svn: 363039
2019-06-11 09:29:18 +00:00

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# RUN: llvm-mc -triple=thumbv8.1m.main-none-eabi -mattr=+8msecext,+mve -show-encoding -disassemble < %s \
# RUN: | FileCheck --check-prefix=CHECK %s
# RUN: not llvm-mc -triple=thumbv8.1m.main-none-eabi -mattr=-8msecext,+mve -show-encoding -disassemble < %s 2>%t \
# RUN: | FileCheck --check-prefix=CHECK-NOSEC %s
# RUN: FileCheck --check-prefix=ERROR-NOSEC < %t %s
# RUN: not llvm-mc -triple=thumbv8.1m.main-none-eabi -mattr=+8msecext,-mve,+vfp2 -show-encoding -disassemble < %s 2> %t \
# RUN: | FileCheck --check-prefix=CHECK-NOMVE %s
# RUN: FileCheck --check-prefix=ERROR-NOMVE < %t %s
# RUN: llvm-mc -triple=thumbv8.1m.main-none-eabi -mattr=+8msecext,+mve,-vfp2 -show-encoding -disassemble < %s \
# RUN: | FileCheck --check-prefix=CHECK-NOVFP %s
# RUN: not llvm-mc -triple=thumbv8.1m.main-none-eabi -mattr=-8msecext,-mve,-vfp2 -show-encoding -disassemble < %s 2> %t
# RUN: FileCheck --check-prefix=ERROR-NONE < %t %s
# RUN: not llvm-mc -triple=thumbv8m.main-none-eabi -mattr=+8msecext,+vfp2 -show-encoding -disassemble < %s 2> %t
# RUN: FileCheck --check-prefix=ERROR-V8M < %t %s
# ERROR-V8M: invalid instruction encoding
# ERROR-NONE: invalid instruction encoding
# CHECK-NOVFP: vmsr fpscr_nzcvqc, r0 @ encoding: [0xe2,0xee,0x10,0x0a]
# CHECK-NOMVE: vmsr fpscr_nzcvqc, r0 @ encoding: [0xe2,0xee,0x10,0x0a]
# CHECK-NOSEC: vmsr fpscr_nzcvqc, r0 @ encoding: [0xe2,0xee,0x10,0x0a]
# CHECK: vmsr fpscr_nzcvqc, r0 @ encoding: [0xe2,0xee,0x10,0x0a]
[0xe2,0xee,0x10,0x0a]
# ERROR-V8M: invalid instruction encoding
# ERROR-NONE: invalid instruction encoding
# CHECK-NOVFP: vmrs r10, fpscr_nzcvqc @ encoding: [0xf2,0xee,0x10,0xaa]
# CHECK-NOMVE: vmrs r10, fpscr_nzcvqc @ encoding: [0xf2,0xee,0x10,0xaa]
# CHECK-NOSEC: vmrs r10, fpscr_nzcvqc @ encoding: [0xf2,0xee,0x10,0xaa]
# CHECK: vmrs r10, fpscr_nzcvqc @ encoding: [0xf2,0xee,0x10,0xaa]
[0xf2,0xee,0x10,0xaa]
# ERROR-V8M: invalid instruction encoding
# ERROR-NONE: invalid instruction encoding
# CHECK-NOVFP: vmrs r0, fpcxtns @ encoding: [0xfe,0xee,0x10,0x0a]
# CHECK-NOMVE: vmrs r0, fpcxtns @ encoding: [0xfe,0xee,0x10,0x0a]
# ERROR-NOSEC: invalid instruction encoding
# CHECK: vmrs r0, fpcxtns @ encoding: [0xfe,0xee,0x10,0x0a]
[0xfe,0xee,0x10,0x0a]
# ERROR-V8M: invalid instruction encoding
# ERROR-NONE: invalid instruction encoding
# CHECK-NOVFP: vmsr fpcxtns, r10 @ encoding: [0xee,0xee,0x10,0xaa]
# CHECK-NOMVE: vmsr fpcxtns, r10 @ encoding: [0xee,0xee,0x10,0xaa]
# ERROR-NOSEC: invalid instruction encoding
# CHECK: vmsr fpcxtns, r10 @ encoding: [0xee,0xee,0x10,0xaa]
[0xee,0xee,0x10,0xaa]
# ERROR-V8M: invalid instruction encoding
# ERROR-NONE: invalid instruction encoding
# CHECK-NOVFP: vmsr fpcxts, r5 @ encoding: [0xef,0xee,0x10,0x5a]
# CHECK-NOMVE: vmsr fpcxts, r5 @ encoding: [0xef,0xee,0x10,0x5a]
# ERROR-NOSEC: invalid instruction encoding
# CHECK: vmsr fpcxts, r5 @ encoding: [0xef,0xee,0x10,0x5a]
[0xef,0xee,0x10,0x5a]
# ERROR-V8M: invalid instruction encoding
# ERROR-NONE: invalid instruction encoding
# CHECK-NOVFP: vmrs r3, fpcxtns @ encoding: [0xfe,0xee,0x10,0x3a]
# CHECK-NOMVE: vmrs r3, fpcxtns @ encoding: [0xfe,0xee,0x10,0x3a]
# ERROR-NOSEC: invalid instruction encoding
# CHECK: vmrs r3, fpcxtns @ encoding: [0xfe,0xee,0x10,0x3a]
[0xfe,0xee,0x10,0x3a]
# ERROR-V8M: invalid instruction encoding
# ERROR-NONE: invalid instruction encoding
# CHECK-NOVFP: vmrs r0, fpcxts @ encoding: [0xff,0xee,0x10,0x0a]
# CHECK-NOMVE: vmrs r0, fpcxts @ encoding: [0xff,0xee,0x10,0x0a]
# ERROR-NOSEC: invalid instruction encoding
# CHECK: vmrs r0, fpcxts @ encoding: [0xff,0xee,0x10,0x0a]
[0xff,0xee,0x10,0x0a]
# ERROR-V8M: invalid instruction encoding
# ERROR-NONE: invalid instruction encoding
# ERROR-NOMVE: invalid instruction encoding
# CHECK-NOSEC: vmrs r0, vpr @ encoding: [0xfc,0xee,0x10,0x0a]
# CHECK: vmrs r0, vpr @ encoding: [0xfc,0xee,0x10,0x0a]
[0xfc,0xee,0x10,0x0a]
# ERROR-V8M: invalid instruction encoding
# ERROR-NONE: invalid instruction encoding
# ERROR-NOMVE: invalid instruction encoding
# CHECK-NOSEC: vmrs r4, p0 @ encoding: [0xfd,0xee,0x10,0x4a]
# CHECK: vmrs r4, p0 @ encoding: [0xfd,0xee,0x10,0x4a]
[0xfd,0xee,0x10,0x4a]
# ERROR-V8M: invalid instruction encoding
# ERROR-NONE: invalid instruction encoding
# ERROR-NOMVE: invalid instruction encoding
# CHECK-NOSEC: vmsr vpr, r0 @ encoding: [0xec,0xee,0x10,0x0a]
# CHECK: vmsr vpr, r0 @ encoding: [0xec,0xee,0x10,0x0a]
[0xec,0xee,0x10,0x0a]
# ERROR-V8M: invalid instruction encoding
# ERROR-NONE: invalid instruction encoding
# ERROR-NOMVE: invalid instruction encoding
# CHECK-NOSEC: vmsr p0, r4 @ encoding: [0xed,0xee,0x10,0x4a]
# CHECK: vmsr p0, r4 @ encoding: [0xed,0xee,0x10,0x4a]
[0xed,0xee,0x10,0x4a]