mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-11-23 19:23:23 +01:00
e1dccb4d49
All of these instructions consume one encoded register and the other register is %st. They either write the result to %st or the encoded register. Previously we printed both arguments when the encoded register was written. And we printed one argument when the result was written to %st. For the stack popping forms the encoded register is always the destination and we didn't print both operands. This was inconsistent with gcc and objdump and just makes the output assembly code harder to read. This patch changes things to always print both operands making us consistent with gcc and objdump. The parser should still be able to handle the single register forms just as it did before. This also matches the GNU assembler behavior. llvm-svn: 353061
32 lines
612 B
ArmAsm
32 lines
612 B
ArmAsm
// RUN: llvm-mc -triple x86_64-unknown-unknown -x86-asm-syntax=att %s | FileCheck %s
|
|
|
|
.intel_syntax
|
|
_test:
|
|
// CHECK: movl $257, -4(%rsp)
|
|
mov DWORD PTR [RSP - 4], 257
|
|
.att_syntax
|
|
// CHECK: movl $257, -4(%rsp)
|
|
movl $257, -4(%rsp)
|
|
|
|
_test2:
|
|
.intel_syntax noprefix
|
|
mov DWORD PTR [RSP - 4], 255
|
|
// CHECK: movl $255, -4(%rsp)
|
|
.att_syntax prefix
|
|
movl $255, -4(%rsp)
|
|
// CHECK: movl $255, -4(%rsp)
|
|
|
|
_test3:
|
|
fadd
|
|
// CHECK: faddp %st, %st(1)
|
|
fmul
|
|
// CHECK: fmulp %st, %st(1)
|
|
fsub
|
|
// CHECK: fsubp %st, %st(1)
|
|
fsubr
|
|
// CHECK: fsubrp %st, %st(1)
|
|
fdiv
|
|
// CHECK: fdivp %st, %st(1)
|
|
fdivr
|
|
// CHECK: fdivrp %st, %st(1)
|