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f1715d1306
When matching an interleaved load to an ldN pattern, the interleaved access pass checks that all users of the load are shuffles. If the load is used by an instruction other than a shuffle, the pass gives up and an ldN is not generated. This patch considers users of the load that are extractelement instructions. It attempts to modify the extracts to use one of the available shuffles rather than the load. After the transformation, the load is only used by shuffles and will then be matched with an ldN pattern. Differential Revision: http://reviews.llvm.org/D20250 llvm-svn: 270142
87 lines
2.9 KiB
LLVM
87 lines
2.9 KiB
LLVM
; RUN: opt < %s -mtriple=aarch64 -interleaved-access -S | FileCheck %s
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; CHECK-LABEL: @extract_user_basic(
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; CHECK: %ldN = call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2.v4i32.p0v4i32
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; CHECK: %[[R:.+]] = extractvalue { <4 x i32>, <4 x i32> } %ldN, 0
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; CHECK: extractelement <4 x i32> %[[R]], i64 1
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define void @extract_user_basic(<8 x i32>* %A, i1 %C) {
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entry:
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%L = load <8 x i32>, <8 x i32>* %A, align 8
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%S = shufflevector <8 x i32> %L, <8 x i32> undef, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
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br i1 %C, label %if.then, label %if.merge
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if.then:
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%E = extractelement <8 x i32> %L, i32 2
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br label %if.merge
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if.merge:
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ret void
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}
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; CHECK-LABEL: @extract_user_multi(
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; CHECK: %ldN = call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2.v4i32.p0v4i32
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; CHECK: %[[R:.+]] = extractvalue { <4 x i32>, <4 x i32> } %ldN, 0
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; CHECK: extractelement <4 x i32> %[[R]], i64 0
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; CHECK: extractelement <4 x i32> %[[R]], i64 1
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define void @extract_user_multi(<8 x i32>* %A, i1 %C) {
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entry:
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%L = load <8 x i32>, <8 x i32>* %A, align 8
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%S = shufflevector <8 x i32> %L, <8 x i32> undef, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
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br i1 %C, label %if.then, label %if.merge
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if.then:
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%E1 = extractelement <8 x i32> %L, i32 0
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br label %if.merge
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if.merge:
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%E2 = extractelement <8 x i32> %L, i32 2
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ret void
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}
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; CHECK-LABEL: @extract_user_multi_no_dom(
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; CHECK-NOT: %ldN = call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2.v4i32.p0v4i32
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define void @extract_user_multi_no_dom(<8 x i32>* %A, i1 %C) {
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entry:
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%L = load <8 x i32>, <8 x i32>* %A, align 8
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%E1 = extractelement <8 x i32> %L, i32 0
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br i1 %C, label %if.then, label %if.merge
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if.then:
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%S = shufflevector <8 x i32> %L, <8 x i32> undef, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
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%E2 = extractelement <8 x i32> %L, i32 2
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br label %if.merge
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if.merge:
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ret void
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}
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; CHECK-LABEL: @extract_user_wrong_const_index(
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; CHECK-NOT: %ldN = call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2.v4i32.p0v4i32
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define void @extract_user_wrong_const_index(<8 x i32>* %A) {
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entry:
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%L = load <8 x i32>, <8 x i32>* %A, align 8
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%S = shufflevector <8 x i32> %L, <8 x i32> undef, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
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%E = extractelement <8 x i32> %L, i32 1
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ret void
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}
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; CHECK-LABEL: @extract_user_undef_index(
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; CHECK-NOT: %ldN = call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2.v4i32.p0v4i32
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define void @extract_user_undef_index(<8 x i32>* %A) {
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entry:
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%L = load <8 x i32>, <8 x i32>* %A, align 8
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%S = shufflevector <8 x i32> %L, <8 x i32> undef, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
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%E = extractelement <8 x i32> %L, i32 undef
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ret void
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}
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; CHECK-LABEL: @extract_user_var_index(
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; CHECK-NOT: %ldN = call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2.v4i32.p0v4i32
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define void @extract_user_var_index(<8 x i32>* %A, i32 %I) {
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entry:
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%L = load <8 x i32>, <8 x i32>* %A, align 8
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%S = shufflevector <8 x i32> %L, <8 x i32> undef, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
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%E = extractelement <8 x i32> %L, i32 %I
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ret void
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}
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