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048a920e0e
Summary: The goal is for each operand type to have its own parse function and at the same time share common code for tracking state as different instruction types share operand types (e.g. glc/glc_flat, etc). Introduce parseAMDGPUOperand which can parse any optional operand. DPP and Clamp/OMod have custom handling for now. Sam also suggested to have class hierarchy for operand types instead of table. This can be done in separate change. Remove parseVOP3OptionalOps, parseDS*OptionalOps, parseFlatOptionalOps, parseMubufOptionalOps, parseDPPOptionalOps. Reduce number of definitions of AsmOperand's and MatchClasses' by using common base class. Rename AsmMatcher/InstPrinter methods accordingly. Print immediate type when printing parsed immediate operand. Use 'off' if offset/index register is unused instead of skipping it to make it more readable (also agreed with SP3). Update tests. Reviewers: tstellarAMD, SamWot, artem.tamazov Subscribers: qcolombet, arsenm, llvm-commits Differential Revision: http://reviews.llvm.org/D19584 llvm-svn: 268015
97 lines
4.5 KiB
LLVM
97 lines
4.5 KiB
LLVM
; RUN: llc -march=amdgcn -mcpu=hawaii -verify-machineinstrs < %s | FileCheck -check-prefix=CI -check-prefix=COMMON %s
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; RUN: llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=COMMON %s
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; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=CI -check-prefix=COMMON %s
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; COMMON-LABEL: {{^}}fdiv_f64:
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; COMMON-DAG: buffer_load_dwordx2 [[NUM:v\[[0-9]+:[0-9]+\]]], off, {{s\[[0-9]+:[0-9]+\]}}, 0
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; COMMON-DAG: buffer_load_dwordx2 [[DEN:v\[[0-9]+:[0-9]+\]]], off, {{s\[[0-9]+:[0-9]+\]}}, 0 offset:8
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; CI-DAG: v_div_scale_f64 [[SCALE0:v\[[0-9]+:[0-9]+\]]], {{s\[[0-9]+:[0-9]+\]}}, [[DEN]], [[DEN]], [[NUM]]
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; CI-DAG: v_div_scale_f64 [[SCALE1:v\[[0-9]+:[0-9]+\]]], vcc, [[NUM]], [[DEN]], [[NUM]]
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; Check for div_scale bug workaround on SI
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; SI-DAG: v_div_scale_f64 [[SCALE0:v\[[0-9]+:[0-9]+\]]], {{s\[[0-9]+:[0-9]+\]}}, [[DEN]], [[DEN]], [[NUM]]
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; SI-DAG: v_div_scale_f64 [[SCALE1:v\[[0-9]+:[0-9]+\]]], {{s\[[0-9]+:[0-9]+\]}}, [[NUM]], [[DEN]], [[NUM]]
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; COMMON-DAG: v_rcp_f64_e32 [[RCP_SCALE0:v\[[0-9]+:[0-9]+\]]], [[SCALE0]]
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; SI-DAG: v_cmp_eq_i32_e32 vcc, {{v[0-9]+}}, {{v[0-9]+}}
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; SI-DAG: v_cmp_eq_i32_e64 [[CMP0:s\[[0-9]+:[0-9]+\]]], {{v[0-9]+}}, {{v[0-9]+}}
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; SI-DAG: s_xor_b64 vcc, [[CMP0]], vcc
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; COMMON-DAG: v_fma_f64 [[FMA0:v\[[0-9]+:[0-9]+\]]], -[[SCALE0]], [[RCP_SCALE0]], 1.0
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; COMMON-DAG: v_fma_f64 [[FMA1:v\[[0-9]+:[0-9]+\]]], [[RCP_SCALE0]], [[FMA0]], [[RCP_SCALE0]]
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; COMMON-DAG: v_fma_f64 [[FMA2:v\[[0-9]+:[0-9]+\]]], -[[SCALE0]], [[FMA1]], 1.0
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; COMMON-DAG: v_fma_f64 [[FMA3:v\[[0-9]+:[0-9]+\]]], [[FMA1]], [[FMA2]], [[FMA1]]
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; COMMON-DAG: v_mul_f64 [[MUL:v\[[0-9]+:[0-9]+\]]], [[SCALE1]], [[FMA3]]
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; COMMON-DAG: v_fma_f64 [[FMA4:v\[[0-9]+:[0-9]+\]]], -[[SCALE0]], [[MUL]], [[SCALE1]]
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; COMMON: v_div_fmas_f64 [[FMAS:v\[[0-9]+:[0-9]+\]]], [[FMA4]], [[FMA3]], [[MUL]]
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; COMMON: v_div_fixup_f64 [[RESULT:v\[[0-9]+:[0-9]+\]]], [[FMAS]], [[DEN]], [[NUM]]
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; COMMON: buffer_store_dwordx2 [[RESULT]]
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; COMMON: s_endpgm
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define void @fdiv_f64(double addrspace(1)* %out, double addrspace(1)* %in) nounwind {
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%gep.1 = getelementptr double, double addrspace(1)* %in, i32 1
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%num = load volatile double, double addrspace(1)* %in
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%den = load volatile double, double addrspace(1)* %gep.1
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%result = fdiv double %num, %den
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store double %result, double addrspace(1)* %out
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ret void
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}
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; COMMON-LABEL: {{^}}fdiv_f64_s_v:
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define void @fdiv_f64_s_v(double addrspace(1)* %out, double addrspace(1)* %in, double %num) nounwind {
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%den = load double, double addrspace(1)* %in
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%result = fdiv double %num, %den
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store double %result, double addrspace(1)* %out
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ret void
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}
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; COMMON-LABEL: {{^}}fdiv_f64_v_s:
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define void @fdiv_f64_v_s(double addrspace(1)* %out, double addrspace(1)* %in, double %den) nounwind {
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%num = load double, double addrspace(1)* %in
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%result = fdiv double %num, %den
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store double %result, double addrspace(1)* %out
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ret void
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}
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; COMMON-LABEL: {{^}}fdiv_f64_s_s:
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define void @fdiv_f64_s_s(double addrspace(1)* %out, double %num, double %den) nounwind {
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%result = fdiv double %num, %den
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store double %result, double addrspace(1)* %out
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ret void
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}
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; COMMON-LABEL: {{^}}v_fdiv_v2f64:
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define void @v_fdiv_v2f64(<2 x double> addrspace(1)* %out, <2 x double> addrspace(1)* %in) nounwind {
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%gep.1 = getelementptr <2 x double>, <2 x double> addrspace(1)* %in, i32 1
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%num = load <2 x double>, <2 x double> addrspace(1)* %in
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%den = load <2 x double>, <2 x double> addrspace(1)* %gep.1
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%result = fdiv <2 x double> %num, %den
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store <2 x double> %result, <2 x double> addrspace(1)* %out
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ret void
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}
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; COMMON-LABEL: {{^}}s_fdiv_v2f64:
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define void @s_fdiv_v2f64(<2 x double> addrspace(1)* %out, <2 x double> %num, <2 x double> %den) {
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%result = fdiv <2 x double> %num, %den
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store <2 x double> %result, <2 x double> addrspace(1)* %out
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ret void
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}
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; COMMON-LABEL: {{^}}v_fdiv_v4f64:
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define void @v_fdiv_v4f64(<4 x double> addrspace(1)* %out, <4 x double> addrspace(1)* %in) nounwind {
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%gep.1 = getelementptr <4 x double>, <4 x double> addrspace(1)* %in, i32 1
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%num = load <4 x double>, <4 x double> addrspace(1)* %in
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%den = load <4 x double>, <4 x double> addrspace(1)* %gep.1
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%result = fdiv <4 x double> %num, %den
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store <4 x double> %result, <4 x double> addrspace(1)* %out
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ret void
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}
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; COMMON-LABEL: {{^}}s_fdiv_v4f64:
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define void @s_fdiv_v4f64(<4 x double> addrspace(1)* %out, <4 x double> %num, <4 x double> %den) {
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%result = fdiv <4 x double> %num, %den
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store <4 x double> %result, <4 x double> addrspace(1)* %out
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ret void
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}
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