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a7b041da1f
Thumb1 has legitimate reasons for preferring 32-bit alignment of types i1/i8/i16, since the 16-bit encoding of "add rD, sp, #imm" requires #imm to be a multiple of 4. However, this is a trade-off betweem code size and RAM usage; the DataLayout string is not the best place to represent it even if desired. So this patch removes the extra Thumb requirements, hopefully making ARM and Thumb completely compatible in this respect. llvm-svn: 219734
11 lines
458 B
LLVM
11 lines
458 B
LLVM
; RUN: llc < %s | FileCheck %s
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target triple = "thumbv7-apple-darwin10.0.0"
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; CHECK: align 3
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@.v = private unnamed_addr constant <4 x i32> <i32 1, i32 2, i32 3, i32 4>, align 8
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; CHECK: align 4
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@.strA = private unnamed_addr constant [4 x i64] zeroinitializer
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; CHECK-NOT: align
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@.strB = private unnamed_addr constant [4 x i8] c"foo\00", align 1
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@.strC = private unnamed_addr constant [4 x i8] c"baz\00", section "__TEXT,__cstring,cstring_literals", align 1
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