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llvm-mirror/test/CodeGen/X86/epilogue-cfi-no-fp.ll
Matthias Braun aee5f0fc5d Relax fast register allocator related test cases; NFC
- Relex hard coded registers and stack frame sizes
- Some test cleanups
- Change phi-dbg.ll to match on mir output after phi elimination instead
  of going through the whole codegen pipeline.

This is in preparation for https://reviews.llvm.org/D52010
I'm committing all the test changes upfront that work before and after
independently.

llvm-svn: 345532
2018-10-29 20:10:42 +00:00

20 lines
580 B
LLVM

; RUN: llc -O0 < %s | FileCheck %s
target triple = "i686--"
; Function Attrs: noinline nounwind
define i32 @foo(i32 %i, i32 %j, i32 %k, i32 %l, i32 %m) {
; CHECK-LABEL: foo:
; CHECK: popl %esi
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: popl %edi
; CHECK-NEXT: .cfi_def_cfa_offset 12
; CHECK-NEXT: popl %ebx
; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: popl %ebp
; CHECK-NEXT: .cfi_def_cfa_offset 4
; CHECK-NEXT: retl
entry:
tail call void asm sideeffect "nop", "~{eax},~{ebx},~{ecx},~{edx},~{esi},~{edi},~{ebp}"()
ret i32 0
}