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7cd663b80c
Generally, the ISEL is expanded into if-then-else sequence, in some cases (like when the destination register is the same with the true or false value register), it may just be expanded into just the if or else sequence. llvm-svn: 292154
80 lines
2.0 KiB
LLVM
80 lines
2.0 KiB
LLVM
; RUN: llc -verify-machineinstrs -mcpu=pwr7 < %s | FileCheck %s
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; RUN: llc -verify-machineinstrs -mcpu=pwr7 -ppc-gen-isel=false < %s | FileCheck --check-prefix=CHECK-NO-ISEL %s
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target datalayout = "E-m:e-i64:64-n32:64"
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target triple = "powerpc64-unknown-linux-gnu"
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; Function Attrs: nounwind readnone
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define signext i32 @foo(i32 signext %a, i32 signext %b) #0 {
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entry:
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%cmp = icmp slt i32 %a, %b
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%conv = zext i1 %cmp to i32
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%shl = shl nuw nsw i32 %conv, 4
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ret i32 %shl
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; CHECK-LABEL: @foo
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; CHECK-NO-ISEL-LABEL: @foo
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; CHECK-DAG: cmpw
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; CHECK-DAG: li [[REG1:[0-9]+]], 0
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; CHECK-DAG: li [[REG2:[0-9]+]], 16
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; CHECK: isel 3, [[REG2]], [[REG1]],
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; CHECK: blr
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; CHECK-NO-ISEL: bc 12, 0, [[TRUE:.LBB[0-9]+]]
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; CHECK-NO-ISEL: ori 3, 5, 0
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; CHECK-NO-ISEL-NEXT: blr
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; CHECK-NO-ISEL-NEXT: [[TRUE]]
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; CHECK-NO-ISEL-NEXT: addi 3, 12, 0
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; CHECK-NO-ISEL-NEXT: blr
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}
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; Function Attrs: nounwind readnone
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define signext i32 @foo2(i32 signext %a, i32 signext %b) #0 {
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entry:
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%cmp = icmp slt i32 %a, %b
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%conv = zext i1 %cmp to i32
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%shl = shl nuw nsw i32 %conv, 4
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%add1 = or i32 %shl, 5
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ret i32 %add1
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; CHECK-LABEL: @foo2
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; CHECK-NO-ISEL-LABEL: @foo2
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; CHECK-DAG: cmpw
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; CHECK-DAG: li [[REG1:[0-9]+]], 5
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; CHECK-DAG: li [[REG2:[0-9]+]], 21
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; CHECK: isel 3, [[REG2]], [[REG1]],
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; CHECK: blr
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; CHECK-NO-ISEL: bc 12, 0, [[TRUE:.LBB[0-9]+]]
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; CHECK-NO-ISEL: ori 3, 5, 0
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; CHECK-NO-ISEL-NEXT: blr
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; CHECK-NO-ISEL-NEXT: [[TRUE]]
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; CHECK-NO-ISEL-NEXT: addi 3, 12, 0
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; CHECK-NO-ISEL-NEXT: blr
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}
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; Function Attrs: nounwind readnone
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define signext i32 @foo3(i32 signext %a, i32 signext %b) #0 {
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entry:
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%cmp = icmp sle i32 %a, %b
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%conv = zext i1 %cmp to i32
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%shl = shl nuw nsw i32 %conv, 4
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ret i32 %shl
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; CHECK-LABEL: @foo3
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; CHECK-NO-ISEL-LABEL: @foo3
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; CHECK-DAG: cmpw
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; CHECK-DAG: li [[REG1:[0-9]+]], 16
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; CHECK: isel 3, 0, [[REG1]],
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; CHECK: blr
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; CHECK-NO-ISEL: bc 12, 1, [[TRUE:.LBB[0-9]+]]
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; CHECK-NO-ISEL: ori 3, 5, 0
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; CHECK-NO-ISEL-NEXT: blr
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; CHECK-NO-ISEL-NEXT: [[TRUE]]
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; CHECK-NO-ISEL-NEXT: addi 3, 0, 0
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; CHECK-NO-ISEL-NEXT: blr
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}
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attributes #0 = { nounwind readnone }
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