Evan Cheng 25c07ac593 Teach liveintervalanalysis about virtual registers which are defined by reg_sequence instructions that are formed by registers defined by distinct instructions. e.g. ... 80 %reg1041:6<def> = VSHRNv4i16 %reg1034<kill>, 12, pred:14, pred:%reg0 . . . 120 %reg1041:5<def> = VSHRNv4i16 %reg1039<kill>, 12, pred:14, pred:%reg0 llvm-svn: 103102		2010-05-05 18:27:40 +00:00
..
llvm	Teach liveintervalanalysis about virtual registers which are defined by reg_sequence instructions that are formed by registers defined by distinct instructions. e.g.	2010-05-05 18:27:40 +00:00
llvm-c	add some more (void)'s to prototypes for PR6961	2010-04-29 23:27:32 +00:00