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ee0d5cd952
This adds support for the new 32-bit vector float instructions of z14. This includes: - Enabling the instructions for the assembler/disassembler. - CodeGen for the instructions, including new LLVM intrinsics. - Scheduler description support for the instructions. - Update to the vector cost function calculations. In general, CodeGen support for the new v4f32 instructions closely matches support for the existing v2f64 instructions. llvm-svn: 308195
122 lines
3.8 KiB
LLVM
122 lines
3.8 KiB
LLVM
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 \
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; RUN: | FileCheck -check-prefix=CHECK -check-prefix=CHECK-SCALAR %s
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 \
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; RUN: | FileCheck -check-prefix=CHECK -check-prefix=CHECK-VECTOR %s
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declare float @llvm.fma.f32(float %f1, float %f2, float %f3)
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define float @f1(float %f1, float %f2, float %acc) {
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; CHECK-LABEL: f1:
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; CHECK-SCALAR: msebr %f4, %f0, %f2
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; CHECK-SCALAR: ler %f0, %f4
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; CHECK-VECTOR: wfmssb %f0, %f0, %f2, %f4
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; CHECK: br %r14
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%negacc = fsub float -0.0, %acc
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%res = call float @llvm.fma.f32 (float %f1, float %f2, float %negacc)
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ret float %res
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}
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define float @f2(float %f1, float *%ptr, float %acc) {
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; CHECK-LABEL: f2:
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; CHECK: mseb %f2, %f0, 0(%r2)
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; CHECK-SCALAR: ler %f0, %f2
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; CHECK-VECTOR: ldr %f0, %f2
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; CHECK: br %r14
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%f2 = load float , float *%ptr
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%negacc = fsub float -0.0, %acc
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%res = call float @llvm.fma.f32 (float %f1, float %f2, float %negacc)
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ret float %res
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}
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define float @f3(float %f1, float *%base, float %acc) {
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; CHECK-LABEL: f3:
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; CHECK: mseb %f2, %f0, 4092(%r2)
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; CHECK-SCALAR: ler %f0, %f2
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; CHECK-VECTOR: ldr %f0, %f2
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; CHECK: br %r14
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%ptr = getelementptr float, float *%base, i64 1023
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%f2 = load float , float *%ptr
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%negacc = fsub float -0.0, %acc
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%res = call float @llvm.fma.f32 (float %f1, float %f2, float %negacc)
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ret float %res
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}
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define float @f4(float %f1, float *%base, float %acc) {
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; The important thing here is that we don't generate an out-of-range
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; displacement. Other sequences besides this one would be OK.
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;
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; CHECK-LABEL: f4:
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; CHECK: aghi %r2, 4096
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; CHECK: mseb %f2, %f0, 0(%r2)
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; CHECK-SCALAR: ler %f0, %f2
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; CHECK-VECTOR: ldr %f0, %f2
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; CHECK: br %r14
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%ptr = getelementptr float, float *%base, i64 1024
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%f2 = load float , float *%ptr
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%negacc = fsub float -0.0, %acc
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%res = call float @llvm.fma.f32 (float %f1, float %f2, float %negacc)
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ret float %res
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}
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define float @f5(float %f1, float *%base, float %acc) {
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; Here too the important thing is that we don't generate an out-of-range
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; displacement. Other sequences besides this one would be OK.
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;
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; CHECK-LABEL: f5:
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; CHECK: aghi %r2, -4
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; CHECK: mseb %f2, %f0, 0(%r2)
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; CHECK-SCALAR: ler %f0, %f2
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; CHECK-VECTOR: ldr %f0, %f2
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; CHECK: br %r14
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%ptr = getelementptr float, float *%base, i64 -1
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%f2 = load float , float *%ptr
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%negacc = fsub float -0.0, %acc
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%res = call float @llvm.fma.f32 (float %f1, float %f2, float %negacc)
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ret float %res
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}
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define float @f6(float %f1, float *%base, i64 %index, float %acc) {
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; CHECK-LABEL: f6:
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; CHECK: sllg %r1, %r3, 2
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; CHECK: mseb %f2, %f0, 0(%r1,%r2)
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; CHECK-SCALAR: ler %f0, %f2
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; CHECK-VECTOR: ldr %f0, %f2
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; CHECK: br %r14
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%ptr = getelementptr float, float *%base, i64 %index
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%f2 = load float , float *%ptr
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%negacc = fsub float -0.0, %acc
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%res = call float @llvm.fma.f32 (float %f1, float %f2, float %negacc)
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ret float %res
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}
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define float @f7(float %f1, float *%base, i64 %index, float %acc) {
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; CHECK-LABEL: f7:
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; CHECK: sllg %r1, %r3, 2
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; CHECK: mseb %f2, %f0, 4092({{%r1,%r2|%r2,%r1}})
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; CHECK-SCALAR: ler %f0, %f2
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; CHECK-VECTOR: ldr %f0, %f2
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; CHECK: br %r14
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%index2 = add i64 %index, 1023
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%ptr = getelementptr float, float *%base, i64 %index2
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%f2 = load float , float *%ptr
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%negacc = fsub float -0.0, %acc
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%res = call float @llvm.fma.f32 (float %f1, float %f2, float %negacc)
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ret float %res
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}
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define float @f8(float %f1, float *%base, i64 %index, float %acc) {
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; CHECK-LABEL: f8:
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; CHECK: sllg %r1, %r3, 2
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; CHECK: lay %r1, 4096({{%r1,%r2|%r2,%r1}})
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; CHECK: mseb %f2, %f0, 0(%r1)
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; CHECK-SCALAR: ler %f0, %f2
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; CHECK-VECTOR: ldr %f0, %f2
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; CHECK: br %r14
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%index2 = add i64 %index, 1024
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%ptr = getelementptr float, float *%base, i64 %index2
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%f2 = load float , float *%ptr
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%negacc = fsub float -0.0, %acc
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%res = call float @llvm.fma.f32 (float %f1, float %f2, float %negacc)
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ret float %res
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}
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