1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-23 19:23:23 +01:00
llvm-mirror/test/MC
Jim Grosbach d2cfc2b31f ARM assembly parsing and encoding for LDC{2}{L}/STC{2}{L} instructions.
Fill out the rest of the encoding information, update to properly mark
the LDC/STC instructions as predicable while the LDC2/STC2 instructions are
not, and adjust the parser accordingly.

llvm-svn: 141721
2011-10-11 21:55:36 +00:00
..
ARM ARM assembly parsing and encoding for LDC{2}{L}/STC{2}{L} instructions. 2011-10-11 21:55:36 +00:00
AsmParser Added regression test for bug #10869. 2011-09-19 07:48:08 +00:00
COFF Add the suffix to the Win64 EH data sections' names if given. Add a test for 2011-05-27 21:38:47 +00:00
Disassembler Update test for r141704. 2011-10-11 20:18:50 +00:00
ELF Apparently, sometimes llvm-nm doesn't put the undefined symbol at the top. Take 2011-10-11 06:58:11 +00:00
MachO Fix a Darwin x86_64 special case of a jmp to a temporary symbol from an atom 2011-09-08 20:53:44 +00:00
MBlaze Teach the MBlaze asm parser how to parse special purpose register names. 2010-12-20 20:43:24 +00:00
X86 Revert part of r141274. Only need to change encoding for xchg %eax, %eax in 64-bit mode. This is because in 64-bit mode xchg %eax, %eax implies zeroing the upper 32-bits of RAX which makes it not a NOP. In 32-bit mode using NOP encoding is fine. 2011-10-07 05:35:38 +00:00