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llvm-mirror/test/MC/Mips/mips_directives.s
Daniel Sanders be0ced1166 [mips] Use MipsMCExpr instead of MCSymbolRefExpr for all relocations.
Summary:
This is much closer to the way MIPS relocation expressions work
(%hi(foo + 2) rather than %hi(foo) + 2) and removes the need for the
various bodges in MipsAsmParser::evaluateRelocExpr().

Removing those bodges ensures that the constant stored in MCValue is the
full 32 or 64-bit (depending on ABI) offset from the symbol. This will be used
to correct the %hi/%lo matching needed to sort the relocation table correctly.

As part of this:
* Gave MCExpr::print() the ability to omit parenthesis when emitting a
  symbol reference inside a MipsMCExpr operator like %hi(X). Without this
  we print things like %lo(($L1)).
* %hi(%neg(%gprel(X))) is now three MipsMCExpr's instead of one. Most of
  the related special cases have been removed or moved to MipsMCExpr. We
  can remove the rest as we gain support for the less common relocations
  when they are not part of this specific combination.
* Renamed MipsMCExpr::VariantKind and the enum prefix ('VK_') to avoid confusion
  with MCSymbolRefExpr::VariantKind and its prefix (also 'VK_').
* fixup_Mips_GOT_Local and fixup_Mips_GOT_Global were found to be identical
  and merged into fixup_Mips_GOT.
* MO_GOT16 and MO_GOT turned out to be identical and have been merged into
  MO_GOT.
* VK_Mips_GOT and VK_Mips_GOT16 turned out to be the same thing so they
  have been merged into MEK_GOT

Reviewers: sdardis

Subscribers: dsanders, sdardis, llvm-commits

Differential Revision: http://reviews.llvm.org/D19716

llvm-svn: 268379
2016-05-03 13:35:44 +00:00

86 lines
2.5 KiB
ArmAsm

# RUN: llvm-mc -show-encoding -mcpu=mips32 -triple mips-unknown-unknown %s | FileCheck %s
#
# CHECK: .text
# CHECK: $BB0_2:
# CHECK: .abicalls
$BB0_2:
.ent directives_test
.abicalls
.frame $sp,0,$ra
.mask 0x00000000,0
.fmask 0x00000000,0
# CHECK: .set noreorder
# CHECK: b 1332 # encoding: [0x10,0x00,0x01,0x4d]
# CHECK-NOT: nop
# CHECK: j 1328 # encoding: [0x08,0x00,0x01,0x4c]
# CHECK-NOT: nop
# CHECK: jal 1328 # encoding: [0x0c,0x00,0x01,0x4c]
# CHECK-NOT: nop
# CHECK: .set nomacro
.set noreorder
b 1332
j 1328
jal 1328
.set nomacro
.set noat
$JTI0_0:
.gpword ($BB0_2)
.word 0x77fffffc
# CHECK: $JTI0_0:
# CHECK: .gpword ($BB0_2)
# CHECK: .4byte 2013265916
.set at=$12
.set macro
# CHECK: .set macro
# CHECK: .set reorder
# CHECK: b 1332 # encoding: [0x10,0x00,0x01,0x4d]
# CHECK: nop # encoding: [0x00,0x00,0x00,0x00]
# CHECK: j 1328 # encoding: [0x08,0x00,0x01,0x4c]
# CHECK: nop # encoding: [0x00,0x00,0x00,0x00]
# CHECK: jal 1328 # encoding: [0x0c,0x00,0x01,0x4c]
# CHECK: nop # encoding: [0x00,0x00,0x00,0x00]
.set reorder
$BB0_4:
b 1332
j 1328
jal 1328
.set at=$a0
.set STORE_MASK,$t7
.set FPU_MASK,$f7
.set $tmp7, $BB0_4-$BB0_2
.set f6,$f6
# CHECK: abs.s $f6, $f7 # encoding: [0x46,0x00,0x39,0x85]
# CHECK: lui $1, %hi($tmp7) # encoding: [0x3c,0x01,A,A]
# CHECK: # fixup A - offset: 0, value: %hi($tmp7), kind: fixup_Mips_HI16
abs.s f6,FPU_MASK
lui $1, %hi($tmp7)
# CHECK: .set mips32r2
# CHECK: ldxc1 $f0, $zero($5) # encoding: [0x4c,0xa0,0x00,0x01]
# CHECK: luxc1 $f0, $6($5) # encoding: [0x4c,0xa6,0x00,0x05]
# CHECK: lwxc1 $f6, $2($5) # encoding: [0x4c,0xa2,0x01,0x80]
.set mips32r2
ldxc1 $f0, $zero($5)
luxc1 $f0, $6($5)
lwxc1 $f6, $2($5)
# CHECK: .set mips64
# CHECK: dadd $3, $3, $3
.set mips64
dadd $3, $3, $3 # encoding: [0x00,0x62,0x18,0x2c]
# CHECK: .set mips64r2
# CHECK: drotr $9, $6, 30 # encoding: [0x00,0x26,0x4f,0xba]
.set mips64r2
drotr $9, $6, 30
# CHECK: .set dsp
# CHECK: lbux $7, $10($11) # encoding: [0x7d,0x6a,0x39,0x8a]
# CHECK: lhx $5, $6($7) # encoding: [0x7c,0xe6,0x29,0x0a]
.set dsp
lbux $7, $10($11)
lhx $5, $6($7)