Chad Rosier 2673f8862f When fast iseling a GEP, accumulate the offset rather than emitting a series of ... ADDs. MaxOffs is used as a threshold to limit the size of the offset. Tradeoffs being: (1) If we can't materialize the large constant then we'll cause fast-isel to bail. (2) Too large of an offset can't be directly encoded in the ADD resulting in a MOV+ADD. Generally not a bad thing because otherwise we would have had ADD+ADD, but on Thumb this turns into a MOVS+MOVT+ADD. Working on a fix for that. (3) Conversely, too low of a threshold we'll miss opportunities to coalesce ADDs. rdar://10412592 llvm-svn: 144886		2011-11-17 07:15:58 +00:00
..
ARM	When fast iseling a GEP, accumulate the offset rather than emitting a series of	2011-11-17 07:15:58 +00:00
CBackend
CellSPU	Remove histogram tests.	2011-11-12 22:39:40 +00:00
CPP
Generic
MBlaze	Change the default scheduler from Latency to ILP, since Latency	2011-10-24 17:45:02 +00:00
Mips	Reapply r143206, with fixes. Disallow physical register lifetimes	2011-11-03 21:49:52 +00:00
MSP430	Remove the explicit request for "Latency" scheduling from MSP430,	2011-10-24 17:53:16 +00:00
PowerPC	test/CodeGen/PowerPC/2008-10-17-AsmMatchingOperands.ll: [PR11218] Mark "REQUIRES: asserts" for now.	2011-10-28 23:11:03 +00:00
PTX	allow non-device function calls in PTX when natively handling device-side printf	2011-11-11 14:45:12 +00:00
SPARC
Thumb	Reapply r143206, with fixes. Disallow physical register lifetimes	2011-11-03 21:49:52 +00:00
Thumb2	Add vmov.f32 to materialize f32 immediate splats which cannot be handled by	2011-11-15 02:12:34 +00:00
X86	Make sure to replace the chain properly when DAGCombining a LOAD+EXTRACT_VECTOR_ELT into a single LOAD. Fixes PR10747/PR11393.	2011-11-16 23:50:22 +00:00
XCore	Don't fold negative offsets into cp / dp accesses to avoid relocation errors.	2011-11-01 11:31:53 +00:00