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d49cb60862
Summary: This catches malformed mir files which specify alignment as log2 instead of pow2. See https://reviews.llvm.org/D65945 for reference, This is patch is part of a series to introduce an Alignment type. See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html See this patch for the introduction of the type: https://reviews.llvm.org/D64790 Reviewers: courbet Subscribers: MatzeB, qcolombet, dschuff, arsenm, sdardis, nemanjai, jvesely, nhaehnle, hiraditya, kbarton, asb, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, jrtc27, MaskRay, zzheng, edward-jones, atanasyan, rogfer01, MartinMosbeck, brucehoult, the_o, PkmX, jocewei, jsji, Petar.Avramovic, asbirlea, s.egerton, pzheng, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D67433 llvm-svn: 371608
72 lines
1.8 KiB
YAML
72 lines
1.8 KiB
YAML
# RUN: llc -march=mips -mcpu=mips32r2 -mattr=+micromips %s -o - \
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# RUN: -start-after=block-placement | FileCheck %s
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# Test that the micromips jal instruction is correctly handled by the delay slot
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# filler by converting it to a short delay slot for the li instruction.
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# CHECK-LABEL: caller13
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# CHECK: jals callee13
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# CHECK-NEXT: li16
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--- |
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declare i32 @callee13(i32, i32)
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define i32 @caller13() {
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entry:
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%call = tail call i32 (i32, i32) @callee13(i32 1, i32 2)
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ret i32 %call
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}
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...
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---
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name: caller13
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alignment: 4
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exposesReturnsTwice: false
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legalized: false
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regBankSelected: false
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selected: false
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tracksRegLiveness: true
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registers:
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liveins:
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frameInfo:
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isFrameAddressTaken: false
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isReturnAddressTaken: false
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hasStackMap: false
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hasPatchPoint: false
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stackSize: 24
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offsetAdjustment: 0
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maxAlignment: 4
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adjustsStack: true
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hasCalls: true
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stackProtector: ''
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maxCallFrameSize: 16
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hasOpaqueSPAdjustment: false
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hasVAStart: false
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hasMustTailInVarArgFunc: false
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savePoint: ''
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restorePoint: ''
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fixedStack:
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stack:
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- { id: 0, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4,
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stack-id: default, callee-saved-register: '$ra', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '',
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debug-info-location: '' }
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constants:
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body: |
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bb.0.entry:
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liveins: $ra
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$sp = ADDiu $sp, -24
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CFI_INSTRUCTION def_cfa_offset 24
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SW killed $ra, $sp, 20 :: (store 4 into %stack.0)
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CFI_INSTRUCTION offset $ra_64, -4
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$a0 = LI16_MM 1
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$a1 = LI16_MM 2
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JAL_MM @callee13, csr_o32, implicit-def dead $ra, implicit killed $a0, implicit killed $a1, implicit-def $sp, implicit-def $v0
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$ra = LW $sp, 20 :: (load 4 from %stack.0)
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$sp = ADDiu $sp, 24
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PseudoReturn undef $ra, implicit $v0
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...
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