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121 lines
4.6 KiB
C++
121 lines
4.6 KiB
C++
//===- Target.td - Target Independent TableGen interface --------*- C++ -*-===//
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//
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// This file defines the target-independent interfaces which should be
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// implemented by each target which is using a TableGen based code generator.
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//
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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//
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// Value types - These values correspond to the register types defined in the
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// ValueTypes.h file.
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//
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class ValueType<int size> { string Namespace = "MVT"; int Size = size; }
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def i1 : ValueType<1>; // One bit boolean value
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def i8 : ValueType<8>; // 8-bit integer value
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def i16 : ValueType<16>; // 16-bit integer value
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def i32 : ValueType<32>; // 32-bit integer value
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def i64 : ValueType<64>; // 64-bit integer value
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def i128 : ValueType<128>; // 128-bit integer value
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def f32 : ValueType<32>; // 32-bit floating point value
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def f64 : ValueType<64>; // 64-bit floating point value
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def f80 : ValueType<80>; // 80-bit floating point value
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def f128 : ValueType<128>; // 128-bit floating point value
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//===----------------------------------------------------------------------===//
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// Register file description - These classes are used to fill in the target
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// description classes in llvm/Target/MRegisterInfo.h
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// Register - You should define one instance of this class for each register in
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// the target machine.
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//
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class Register {
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string Namespace = "";
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}
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// RegisterAliases - You should define instances of this class to indicate which
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// registers in the register file are aliased together. This allows the code
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// generator to be careful not to put two values with overlapping live ranges
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// into registers which alias.
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//
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class RegisterAliases<Register reg, list<Register> aliases> {
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Register Reg = reg;
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list<Register> Aliases = aliases;
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}
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// RegisterClass - Now that all of the registers are defined, and aliases
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// between registers are defined, specify which registers belong to which
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// register classes. This also defines the default allocation order of
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// registers by register allocators.
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//
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class RegisterClass<ValueType regType, int alignment, list<Register> regList> {
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// RegType - Specify the ValueType of the registers in this register class.
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// Note that all registers in a register class must have the same ValueType.
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//
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ValueType RegType = regType;
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// Alignment - Specify the alignment required of the registers when they are
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// stored or loaded to memory.
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//
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int Size = RegType.Size;
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int Alignment = alignment;
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// MemberList - Specify which registers are in this class. If the
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// allocation_order_* method are not specified, this also defines the order of
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// allocation used by the register allocator.
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//
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list<Register> MemberList = regList;
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// allocation_order_* - These methods define the order that the registers
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// should be allocated. See the MRegister.h file for more information.
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//
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code allocation_order_begin;
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code allocation_order_end;
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}
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// RegisterInfo - This class should only be instantiated once to provide
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// parameters which are global to the the target machine, such as callee safed
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// registers.
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//
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class RegisterInfo {
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// ClassName - Specify the name of the class that should be generated by the
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// register info emitter. This class may be further subclasses by custom
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// target code to implement virtual methods as necessary. Targets must
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// specify a value for this.
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//
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string ClassName;
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// CalleeSavedRegisters - As you might guess, this is a list of the callee
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// saved registers for a target.
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list<Register> CalleeSavedRegisters = [];
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// PointerType - Specify the value type to be used to represent pointers in
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// this target. Typically this is an i32 or i64 type.
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ValueType PointerType;
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}
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//===----------------------------------------------------------------------===//
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// Instruction set description -
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//
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class Instruction {
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string Name; // The opcode string for this instruction
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string Namespace = "";
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list<Register> Uses = []; // Default to using no non-operand registers
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list<Register> Defs = []; // Default to modifying no non-operand registers
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// These bits capture information about the high-level semantics of the
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// instruction.
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bit isReturn = 0; // Is this instruction a return instruction?
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bit isBranch = 0; // Is this instruction a branch instruction?
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bit isCall = 0; // Is this instruction a call instruction?
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bit isTwoAddress = 0; // Is this a two address instruction?
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bit isTerminator = 0; // Is this part of the terminator for a basic block?
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}
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