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ebeb37f2e9
This allows to avoid scratch use or indirect VGPR addressing for small vectors. Differential Revision: https://reviews.llvm.org/D54606 llvm-svn: 347231
16 lines
551 B
LLVM
16 lines
551 B
LLVM
; RUN: llc -march=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
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; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
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; GCN-LABEL: {{^}}main:
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; GCN: v_movreld_b32_e32 v0,
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; GCN: v_mov_b32_e32 v0, v1
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; GCN: ; return
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define amdgpu_ps float @main(i32 inreg %arg) #0 {
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main_body:
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%tmp24 = insertelement <16 x float> undef, float 0.000000e+00, i32 %arg
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%tmp25 = extractelement <16 x float> %tmp24, i32 1
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ret float %tmp25
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}
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attributes #0 = { "InitialPSInputAddr"="36983" }
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