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c168815f4b
Summary: The -mcpu=mips16 option caused the Integrated Assembler to crash because it couldn't figure out the architecture revision number to write to the .MIPS.abiflags section. This CPU definition has been removed because, like microMIPS, MIPS16 is an ASE to a base architecture. Reviewers: vkalintiris Subscribers: rkotler, llvm-commits, dsanders Differential Revision: http://reviews.llvm.org/D13656 llvm-svn: 250407
46 lines
1.4 KiB
LLVM
46 lines
1.4 KiB
LLVM
; Check that stubs generation for mips16 hard-float mode does not depend
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; on the function 'use-soft-float' attribute's value.
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; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel \
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; RUN: -mattr=mips16 -relocation-model=pic < %s | FileCheck %s
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define void @bar_hf() #0 {
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; CHECK: bar_hf:
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entry:
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%call1 = call float @foo(float 1.000000e+00)
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; CHECK: lw $2, %call16(foo)($3)
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; CHECK: lw $5, %got(__mips16_call_stub_sf_1)($3)
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ret void
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}
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define void @bar_sf() #1 {
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; CHECK: bar_sf:
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entry:
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%call1 = call float @foo(float 1.000000e+00)
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; CHECK: lw $3, %call16(foo)($2)
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; CHECK-NOT: lw $5, %got(__mips16_call_stub_sf_1)($3)
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ret void
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}
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declare float @foo(float) #2
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attributes #0 = {
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nounwind
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"less-precise-fpmad"="false" "no-frame-pointer-elim"="true"
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"no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false"
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"no-nans-fp-math"="false" "stack-protector-buffer-size"="8"
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"unsafe-fp-math"="false" "use-soft-float"="false"
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}
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attributes #1 = {
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nounwind
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"less-precise-fpmad"="false" "no-frame-pointer-elim"="true"
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"no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false"
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"no-nans-fp-math"="false" "stack-protector-buffer-size"="8"
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"unsafe-fp-math"="false" "use-soft-float"="true"
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}
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attributes #2 = {
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"less-precise-fpmad"="false" "no-frame-pointer-elim"="true"
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"no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false"
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"no-nans-fp-math"="false" "stack-protector-buffer-size"="8"
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"unsafe-fp-math"="false" "use-soft-float"="true"
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}
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