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bb20b9f410
This reverts commit r281022. Mips buildbot broke, due to unhandled register class FCC. llvm-svn: 281033
44 lines
1.3 KiB
LLVM
44 lines
1.3 KiB
LLVM
; RUN: llc -march=mipsel -mcpu=mips32 -relocation-model=pic < %s
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; RUN: llc -march=mipsel -mcpu=mips32 -pre-RA-sched=source -relocation-model=pic < %s | FileCheck %s --check-prefix=SOURCE-SCHED
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; RUN: llc -march=mipsel -mcpu=mips32r2 -relocation-model=pic < %s
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; RUN: llc -march=mipsel -mcpu=mips32r2 -pre-RA-sched=source -relocation-model=pic < %s | FileCheck %s --check-prefix=SOURCE-SCHED
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@gf0 = external global float
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@gf1 = external global float
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@gd0 = external global double
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@gd1 = external global double
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define float @select_cc_f32(float %a, float %b) nounwind {
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entry:
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; SOURCE-SCHED: lui
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; SOURCE-SCHED: addiu
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; SOURCE-SCHED: addu
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; SOURCE-SCHED: lw
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; SOURCE-SCHED: sw
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; SOURCE-SCHED: lw
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; SOURCE-SCHED: lui
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; SOURCE-SCHED: sw
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; SOURCE-SCHED: lw
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; SOURCE-SCHED: lwc1
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; SOURCE-SCHED: mtc1
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; SOURCE-SCHED: c.olt.s
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; SOURCE-SCHED: jr
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store float 0.000000e+00, float* @gf0, align 4
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store float 1.000000e+00, float* @gf1, align 4
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%cmp = fcmp olt float %a, %b
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%conv = zext i1 %cmp to i32
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%conv1 = sitofp i32 %conv to float
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ret float %conv1
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}
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define double @select_cc_f64(double %a, double %b) nounwind {
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entry:
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store double 0.000000e+00, double* @gd0, align 8
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store double 1.000000e+00, double* @gd1, align 8
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%cmp = fcmp olt double %a, %b
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%conv = zext i1 %cmp to i32
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%conv1 = sitofp i32 %conv to double
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ret double %conv1
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}
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