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aee5f0fc5d
- Relex hard coded registers and stack frame sizes - Some test cleanups - Change phi-dbg.ll to match on mir output after phi elimination instead of going through the whole codegen pipeline. This is in preparation for https://reviews.llvm.org/D52010 I'm committing all the test changes upfront that work before and after independently. llvm-svn: 345532
25 lines
701 B
LLVM
25 lines
701 B
LLVM
; Test that a rosbg conversion involving a sign extend operation rotates with
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; the right number of steps.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu -O0 | FileCheck %s
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@g_136 = external global i16, align 2
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@g_999 = external global i32, align 4
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; Function Attrs: nounwind
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define void @main() {
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%1 = load i32, i32* undef, align 4
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store i16 -28141, i16* @g_136, align 2
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%2 = load i32, i32* undef, align 4
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%3 = xor i32 -28141, %2
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%4 = xor i32 %1, %3
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%5 = sext i32 %4 to i64
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%6 = icmp sgt i64 0, %5
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%7 = zext i1 %6 to i32
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%8 = load i32, i32* @g_999, align 4
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%9 = or i32 %8, %7
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; CHECK: rosbg {{%r[0-9]+}}, {{%r[0-9]+}}, 63, 63, 33
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store i32 %9, i32* @g_999, align 4
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ret void
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}
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