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Generally, the ISEL is expanded into if-then-else sequence, in some cases (like when the destination register is the same with the true or false value register), it may just be expanded into just the if or else sequence. llvm-svn: 292154
60 lines
1.5 KiB
YAML
60 lines
1.5 KiB
YAML
# This file tests the scenario: ISEL R0, ZERO, RX, CR (X != 0)
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# It also tests redundant liveins (%x7) and killed registers.
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# RUN: llc -ppc-gen-isel=false -run-pass ppc-expand-isel -o - %s | FileCheck %s
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--- |
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target datalayout = "E-m:e-i64:64-n32:64"
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target triple = "powerpc64-unknown-linux-gnu"
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define signext i32 @testExpandISEL(i32 signext %i, i32 signext %j) {
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entry:
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%cmp = icmp sgt i32 %i, 0
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%add = add nsw i32 %i, 1
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%cond = select i1 %cmp, i32 %add, i32 %j
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ret i32 %cond
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}
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...
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---
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name: testExpandISEL
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alignment: 2
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exposesReturnsTwice: false
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legalized: false
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regBankSelected: false
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selected: false
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tracksRegLiveness: true
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liveins:
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- { reg: '%x0' }
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- { reg: '%x3' }
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- { reg: '%x7' }
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frameInfo:
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isFrameAddressTaken: false
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isReturnAddressTaken: false
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hasStackMap: false
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hasPatchPoint: false
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stackSize: 0
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offsetAdjustment: 0
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maxAlignment: 0
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adjustsStack: false
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hasCalls: false
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maxCallFrameSize: 0
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hasOpaqueSPAdjustment: false
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hasVAStart: false
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hasMustTailInVarArgFunc: false
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body: |
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bb.0.entry:
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liveins: %x0, %x3, %x7
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%r5 = ADDI %r3, 1
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%cr0 = CMPWI %r3, 0
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%r0 = ISEL killed %zero, killed %r5, killed %cr0gt, implicit killed %cr0
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; CHECK: BC killed %cr0gt, %[[TRUE:bb.[0-9]+]]
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; CHECK: %[[FALSE:bb.[0-9]+]]
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; CHECK: %r0 = ORI killed %r5, 0
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; CHECK: B %[[SUCCESSOR:bb.[0-9]+]]
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; CHECK: [[TRUE]]
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; CHECK: %r0 = ADDI killed %zero, 0
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%x0 = EXTSW_32_64 killed %r0
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...
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