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fe9adb9248
This patch corresponds to review: https://reviews.llvm.org/D23155 This patch removes the VSHRC register class (based on D20310) and adds exploitation of the Power9 sub-word integer loads into VSX registers as well as vector sign extensions. The new instructions are useful for a few purposes: Int to Fp conversions of 1 or 2-byte values loaded from memory Building vectors of 1 or 2-byte integers with values loaded from memory Storing individual 1 or 2-byte elements from integer vectors This patch implements all of those uses. llvm-svn: 283190
12 lines
466 B
LLVM
12 lines
466 B
LLVM
; RUN: not llc -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr8a -mattr=+altivec %s -o - 2>&1 | FileCheck %s
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define hidden void @f(i32 %x) {
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; CHECK: scalar-to-vector conversion failed, possible invalid constraint for vector type
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tail call void asm sideeffect "nop", "{v1}"(i32 %x) nounwind
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; CHECK: scalar-to-vector conversion failed, possible invalid constraint for vector type
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tail call void asm sideeffect "nop", "{vsl1}"(i32 %x) nounwind
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ret void
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}
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