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For the default, small and medium code model, use the existing difference from the jump table towards the label. For all other code models, setup the picbase and use the difference between the picbase and the block address. Overall, this results in smaller data tables at the expensive of one or two more arithmetic operation at the jump site. Given that we only create jump tables with a lot more than two entries, it is a net win in size. For larger code models the assumption remains that individual functions are no larger than 2GB. Differential Revision: https://reviews.llvm.org/D26336 llvm-svn: 287059
80 lines
2.7 KiB
LLVM
80 lines
2.7 KiB
LLVM
; RUN: llc -verify-machineinstrs -mcpu=pwr7 -code-model=medium <%s | FileCheck %s
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; RUN: llc -verify-machineinstrs -mcpu=pwr7 -code-model=large <%s | FileCheck -check-prefix=LARGE %s
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; Test correct code generation for medium and large code model
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; for loading the address of a jump table from the TOC.
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target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
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target triple = "powerpc64-unknown-linux-gnu"
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define signext i32 @test_jump_table(i32 signext %i) nounwind {
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entry:
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%i.addr = alloca i32, align 4
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store i32 %i, i32* %i.addr, align 4
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%0 = load i32, i32* %i.addr, align 4
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switch i32 %0, label %sw.default [
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i32 3, label %sw.bb
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i32 4, label %sw.bb1
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i32 5, label %sw.bb2
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i32 6, label %sw.bb3
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]
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sw.default: ; preds = %entry
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br label %sw.epilog
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sw.bb: ; preds = %entry
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%1 = load i32, i32* %i.addr, align 4
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%mul = mul nsw i32 %1, 7
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store i32 %mul, i32* %i.addr, align 4
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br label %sw.bb1
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sw.bb1: ; preds = %entry, %sw.bb
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%2 = load i32, i32* %i.addr, align 4
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%dec = add nsw i32 %2, -1
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store i32 %dec, i32* %i.addr, align 4
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br label %sw.bb2
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sw.bb2: ; preds = %entry, %sw.bb1
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%3 = load i32, i32* %i.addr, align 4
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%add = add nsw i32 %3, 3
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store i32 %add, i32* %i.addr, align 4
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br label %sw.bb3
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sw.bb3: ; preds = %entry, %sw.bb2
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%4 = load i32, i32* %i.addr, align 4
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%shl = shl i32 %4, 1
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store i32 %shl, i32* %i.addr, align 4
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br label %sw.epilog
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sw.epilog: ; preds = %sw.bb3, %sw.default
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%5 = load i32, i32* %i.addr, align 4
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ret i32 %5
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}
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; CHECK-LABEL: test_jump_table:
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; CHECK-NOT: bl .L0$pb
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; CHECK: addis [[REG1:[0-9]+]], 2, .LC[[TOCNUM:[0-9]+]]@toc@ha
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; CHECK: ld [[REG2:[0-9]+]], .LC[[TOCNUM]]@toc@l([[REG1]])
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; CHECK: lwax [[REG3:[0-9]+]], {{[0-9]+}}, [[REG2]]
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; CHECK-NEXT: add [[REG4:[0-9]+]], [[REG3]], [[REG2]]
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; CHECK-NEXT: mtctr [[REG4]]
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; CHECK-NEXT: bctr
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; CHECK-LABEL: .LJTI0_0:
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; CHECK-NEXT: .long .LBB0_{{[0-9]+}}-.LJTI0_0
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; LARGE-LABEL: test_jump_table:
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; LARGE: bl .L0$pb
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; LARGE-NEXT: .L0$pb:
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; LARGE: mflr [[REGBASE:[0-9]+]]
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; LARGE: addis [[REG1:[0-9]+]], 2, .LC[[TOCNUM:[0-9]+]]@toc@ha
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; LARGE: ld [[REG2:[0-9]+]], .LC[[TOCNUM]]@toc@l([[REG1]])
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; LARGE: lwax [[REG3:[0-9]+]], {{[0-9]+}}, [[REG2]]
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; LARGE-NEXT: add [[REG4:[0-9]+]], [[REG3]], [[REGBASE]]
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; LARGE-NEXT: mtctr [[REG4]]
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; LARGE-NEXT: bctr
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; LARGE-LABEL: .LJTI0_0:
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; LARGE-NEXT: .long .LBB0_{{[0-9]+}}-.L0$pb
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