Matt Arsenault 27b9dfa8e9 AMDGPU/GlobalISel: Improve regbankselect for icmp s16 ... Account for 64-bit scalar eq/ne when available. llvm-svn: 365487		2019-07-09 14:13:09 +00:00
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AArch64	[AArch64][GlobalISel] Use TST for comparisons when possible	2019-07-08 22:58:36 +00:00
AMDGPU	AMDGPU/GlobalISel: Improve regbankselect for icmp s16	2019-07-09 14:13:09 +00:00
ARC
ARM	[ARM] Add support for MSVC stack cookie checking	2019-07-07 18:57:31 +00:00
AVR	[AVR] Fix tests after r363757	2019-07-04 06:12:47 +00:00
BPF
Generic
Hexagon
Inputs
Lanai
Mips	[MIPS GlobalISel] Register bank select for G_LOAD. Select i64 load	2019-07-08 14:45:52 +00:00
MIR	AMDGPU: Make s34 the FP register	2019-07-08 19:03:38 +00:00
MSP430
NVPTX
PowerPC	[NFC][PowerPC] Added a test to show current codegen of MachinePRE	2019-07-09 09:12:17 +00:00
RISCV	[RISCV] Specify registers used in DWARF exception handling	2019-07-08 09:16:47 +00:00
SPARC
SystemZ	[RegisterCoalescer] Fix an overzealous assert	2019-07-06 00:34:54 +00:00
Thumb	[ARM] Favour PL/MI over GE/LT when possible	2019-07-04 08:58:58 +00:00
Thumb2	[ARM] MVE patterns for VMVN, VORR and VBIC	2019-07-05 15:21:29 +00:00
WebAssembly	[WebAssembly] Make sret parameter work with AddMissingPrototypes	2019-07-09 02:10:33 +00:00
WinCFGuard
WinEH
X86	[LegalizeTypes] Fix saturation bug for smul.fix.sat	2019-07-09 10:24:50 +00:00
XCore