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llvm-mirror/test
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Alina Sbirlea 27de8339d1 [MemorySSA] Update analysis when the terminator is a memory instruction. 
Update MemorySSA when moving the terminator instruction, as that may be a memory touching instruction.
Resolves PR44029.
2019-11-20 16:36:52 -08:00
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Analysis
[MemorySSA] Update analysis when the terminator is a memory instruction.
2019-11-20 16:36:52 -08:00
Assembler
[DebugInfo] Remove the DIFlagArgumentNotModified debug info flag
2019-11-20 13:18:40 +01:00
Bindings
[IR] Redefine Freeze instruction
2019-11-12 10:49:00 +09:00
Bitcode
Add support for multi-module bitcode files to llvm-dis
2019-11-14 10:40:41 -08:00
BugPoint
bugpoint: Add option to disable attribute removal
2019-11-19 11:11:00 +05:30
CodeGen
[BPF] Fix a bug in peephole optimization
2019-11-20 15:19:59 -08:00
DebugInfo
[DebugInfo] Remove the DIFlagArgumentNotModified debug info flag
2019-11-20 13:18:40 +01:00
Demangle
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Examples
[Examples] Add IRTransformations directory to examples.
2019-11-12 14:14:48 +00:00
ExecutionEngine
ExecutionEngine: add preliminary support for COFF ARM64
2019-11-20 10:59:42 +02:00
Feature
Temporarily Revert "[SLP] allow forming 2-way reduction patterns" and update testcases.
2019-11-20 16:00:53 -08:00
FileCheck
[FileCheck] Use lit's internal shell for the test suite
2019-11-19 12:08:54 -05:00
Instrumentation
[hwasan] Remove lazy thread-initialisation
2019-11-04 10:58:46 +00:00
Integer
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JitListener
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Linker
[IRMover] Set Address Space for moved global values
2019-11-05 16:32:48 -08:00
LTO
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MachineVerifier
Revert "[MachineVerifier] Improve verification of live-in lists.
2019-11-07 14:02:13 -08:00
MC
Fixup AVR tests to reflect changes in addend format in llvm-objdump
2019-11-19 15:32:58 +00:00
Object
[llvm-objdump] Print relocation addends in hexadecimal
2019-11-19 12:27:18 +00:00
ObjectYAML
[ObjectYAML] - Redefine LLVM_YAML_IS_SEQUENCE_VECTOR(llvm::yaml::Hex*) as LLVM_YAML_IS_FLOW_SEQUENCE_VECTOR.
2019-10-30 18:12:48 +03:00
Other
[llvm-bcanalyzer] Don't dump the contents if -dump is not passed
2019-11-13 10:38:57 -08:00
Reduce
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SafepointIRVerifier
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Support
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SymbolRewriter
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TableGen
[GlobalISel] Match table opt: fix a bug in matching num of operands
2019-11-01 01:57:48 -07:00
ThinLTO/X86
[ThinLTO] Make ValueInfo::operator bool() explicit
2019-11-19 12:46:09 +03:00
tools
Revert "[AArch64] Add the pipeline model for Exynos M5"
2019-11-20 16:04:52 -08:00
Transforms
Temporarily Revert "[SLP] allow forming 2-way reduction patterns" and update testcases.
2019-11-20 16:00:53 -08:00
Unit
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Verifier
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YAMLParser
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.clang-format
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CMakeLists.txt
Introduce llvm-install-name-tool
2019-11-19 23:42:37 -08:00
lit.cfg.py
Introduce llvm-install-name-tool
2019-11-19 23:42:37 -08:00
lit.site.cfg.py.in
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TestRunner.sh
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