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Thumb has more 16-bit encoding space dedicated to ADD than ORR, allowing both a 3-address encoding and a wider range of immediates. So, particularly when optimizing for code size (but it doesn't make things worse elsewhere) it's beneficial to select an OR operation to an ADD if we know overflow won't occur. This is made even better by LLVM's penchant for putting operations in canonical form by converting the other way. llvm-svn: 335119
42 lines
1.1 KiB
LLVM
42 lines
1.1 KiB
LLVM
; RUN: llc -mtriple=thumbv6m-apple-macho %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-T1
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; RUN: llc -mtriple=thumbv7m-apple-macho %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-T2
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define i32 @test_add_i3(i1 %tst, i32 %a, i32 %b) {
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; CHECK-LABEL: test_add_i3:
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; CHECK: adds r0, {{r[0-9]+}}, #2
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%tmp = and i32 %a, -7
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%tmp1 = and i32 %b, -4
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%int = select i1 %tst, i32 %tmp, i32 %tmp1
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; Call to force %int into a register that isn't r0 so using the i3 form is a
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; good idea.
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call void @foo(i32 %int)
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%res = or i32 %int, 2
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ret i32 %res
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}
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define i32 @test_add_i8(i32 %a, i32 %b, i1 %tst) {
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; CHECK-LABEL: test_add_i8:
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; CHECK-T1: adds r0, #12
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; CHECK-T2: add.w r0, {{r[0-9]+}}, #12
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%tmp = and i32 %a, -256
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%tmp1 = and i32 %b, -512
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%int = select i1 %tst, i32 %tmp, i32 %tmp1
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%res = or i32 %int, 12
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ret i32 %res
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}
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define i32 @test_add_i12(i32 %a, i32 %b, i1 %tst) {
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; CHECK-LABEL: test_add_i12:
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; CHECK-T2: addw r0, {{r[0-9]+}}, #854
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%tmp = and i32 %a, -4096
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%tmp1 = and i32 %b, -8192
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%int = select i1 %tst, i32 %tmp, i32 %tmp1
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%res = or i32 %int, 854
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ret i32 %res
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}
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declare void @foo(i32)
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