1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-23 11:13:28 +01:00
llvm-mirror/test/CodeGen/PowerPC/ctrloops-softfloat.ll
Ehsan Amiri db43217a24 Adding -verify-machineinstrs option to PowerPC tests
Currently we have a number of tests that fail with -verify-machineinstrs.
To detect this cases earlier we add the option to the testcases with the
exception of tests that will currently fail with this option. PR 27456 keeps
track of this failures.

No code review, as discussed with Hal Finkel.

llvm-svn: 277624
2016-08-03 18:17:35 +00:00

130 lines
3.4 KiB
LLVM

; RUN: llc -verify-machineinstrs -mtriple=powerpc-unknown-linux-gnu -O1 < %s | FileCheck %s
; double x, y;
;
; void foo1()
; {
; x = y = 1.1;
; for (int i = 0; i < 175; i++)
; y = x + y;
; }
; void foo2()
; {
; x = y = 1.1;
; for (int i = 0; i < 175; i++)
; y = x - y;
; }
; void foo3()
; {
; x = y = 1.1;
; for (int i = 0; i < 175; i++)
; y = x * y;
; }
; void foo4()
; {
; x = y = 1.1;
; for (int i = 0; i < 175; i++)
; y = x / y;
; }
target datalayout = "E-m:e-p:32:32-i64:64-n32"
target triple = "powerpc-buildroot-linux-gnu"
@y = common global double 0.000000e+00, align 8
@x = common global double 0.000000e+00, align 8
define void @foo1() #0 {
store double 1.100000e+00, double* @y, align 8
store double 1.100000e+00, double* @x, align 8
br label %2
; <label>:1 ; preds = %2
%.lcssa = phi double [ %4, %2 ]
store double %.lcssa, double* @y, align 8
ret void
; <label>:2 ; preds = %2, %0
%3 = phi double [ 1.100000e+00, %0 ], [ %4, %2 ]
%i.01 = phi i32 [ 0, %0 ], [ %5, %2 ]
%4 = fadd double %3, 1.100000e+00
%5 = add nuw nsw i32 %i.01, 1
%exitcond = icmp eq i32 %5, 75
br i1 %exitcond, label %1, label %2
; CHECK: bl __adddf3
; CHECK: cmplwi
; CHECK-NOT: li [[REG1:[0-9]+]], 175
; CHECK-NOT: mtctr [[REG1]]
}
define void @foo2() #0 {
store double 1.100000e+00, double* @y, align 8
store double 1.100000e+00, double* @x, align 8
br label %2
; <label>:1 ; preds = %2
%.lcssa = phi double [ %4, %2 ]
store double %.lcssa, double* @y, align 8
ret void
; <label>:2 ; preds = %2, %0
%3 = phi double [ 1.100000e+00, %0 ], [ %4, %2 ]
%i.01 = phi i32 [ 0, %0 ], [ %5, %2 ]
%4 = fsub double 1.100000e+00, %3
%5 = add nuw nsw i32 %i.01, 1
%exitcond = icmp eq i32 %5, 75
br i1 %exitcond, label %1, label %2
; CHECK: bl __subdf3
; CHECK: cmplwi
; CHECK-NOT: li [[REG1:[0-9]+]], 175
; CHECK-NOT: mtctr [[REG1]]
}
define void @foo3() #0 {
store double 1.100000e+00, double* @y, align 8
store double 1.100000e+00, double* @x, align 8
br label %2
; <label>:1 ; preds = %2
%.lcssa = phi double [ %4, %2 ]
store double %.lcssa, double* @y, align 8
ret void
; <label>:2 ; preds = %2, %0
%3 = phi double [ 1.100000e+00, %0 ], [ %4, %2 ]
%i.01 = phi i32 [ 0, %0 ], [ %5, %2 ]
%4 = fmul double %3, 1.100000e+00
%5 = add nuw nsw i32 %i.01, 1
%exitcond = icmp eq i32 %5, 75
br i1 %exitcond, label %1, label %2
; CHECK: bl __muldf3
; CHECK: cmplwi
; CHECK-NOT: li [[REG1:[0-9]+]], 175
; CHECK-NOT: mtctr [[REG1]]
}
define void @foo4() #0 {
store double 1.100000e+00, double* @y, align 8
store double 1.100000e+00, double* @x, align 8
br label %2
; <label>:1 ; preds = %2
%.lcssa = phi double [ %4, %2 ]
store double %.lcssa, double* @y, align 8
ret void
; <label>:2 ; preds = %2, %0
%3 = phi double [ 1.100000e+00, %0 ], [ %4, %2 ]
%i.01 = phi i32 [ 0, %0 ], [ %5, %2 ]
%4 = fdiv double 1.100000e+00, %3
%5 = add nuw nsw i32 %i.01, 1
%exitcond = icmp eq i32 %5, 75
br i1 %exitcond, label %1, label %2
; CHECK: bl __divdf3
; CHECK: cmplwi
; CHECK-NOT: li [[REG1:[0-9]+]], 175
; CHECK-NOT: mtctr [[REG1]]
}
attributes #0 = { "use-soft-float"="true" }